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Searched refs:OK (Results 1 – 12 of 12) sorted by relevance

/drivers/net/plip/
Dplip.c343 #define OK 0 macro
372 if ((r = (*f)(nl->dev, nl, snd, rcv)) != OK && in plip_bh()
373 (r = plip_bh_timeout_error(nl->dev, nl, snd, rcv, r)) != OK) { in plip_bh()
433 return OK; in plip_bh_timeout_error()
474 return OK; in plip_none()
525 return OK; in plip_receive()
613 return OK; in plip_receive_packet()
691 return OK; in plip_receive_packet()
697 return OK; in plip_receive_packet()
700 return OK; in plip_receive_packet()
[all …]
/drivers/net/fddi/skfp/h/
Dsba_def.h63 #define OK 0x01 /* ??????? */ macro
/drivers/net/ethernet/sis/
Dsis900.h200 OK = 0x08000000, DSIZE = 0x00000FFF enumerator
/drivers/gpu/drm/panfrost/
Dpanfrost_device.c305 PANFROST_EXCEPTION(OK),
/drivers/mtd/ubi/
DKconfig25 The default value should be OK for SLC NAND flashes, NOR flashes and
/drivers/mtd/chips/
Dcfi_cmdset_0001.c1163 map_word status, OK = CMD(0x80); in xip_wait_for_operation() local
1204 } while (!map_word_andequal(map, status, OK, OK)); in xip_wait_for_operation()
1262 } while (!map_word_andequal(map, status, OK, OK) in xip_wait_for_operation()
Dcfi_cmdset_0002.c1062 map_word status, OK = CMD(0x80); in xip_udelay() local
1095 } while (!map_word_andequal(map, status, OK, OK)); in xip_udelay()
1145 } while (!map_word_andequal(map, status, OK, OK) in xip_udelay()
/drivers/net/wireless/ath/ath9k/
Dhtc.h412 OK, /* no change needed */ enumerator
Dbeacon.c493 sc->beacon.updateslot = OK; in ath9k_beacon_tasklet()
Dath9k.h698 OK, /* no change needed */ enumerator
/drivers/media/pci/ngene/
Dngene.h244 OK = 0, enumerator
/drivers/gpu/drm/
Ddrm_modes.c1190 MODE_STATUS(OK),