Searched refs:PHYASYMCLK_CLOCK_CNTL (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dccg.h | 34 SR(PHYASYMCLK_CLOCK_CNTL),\
45 SR(PHYASYMCLK_CLOCK_CNTL),\
53 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
54 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
62 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
63 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
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| /drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_dccg.h | 41 SR(PHYASYMCLK_CLOCK_CNTL),\
78 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
79 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
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| D | dcn31_dccg.c | 57 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
61 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dccg.h | 193 uint32_t PHYASYMCLK_CLOCK_CNTL; member
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