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Searched refs:PHYDSYMCLK_CLOCK_CNTL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.h44 SR(PHYDSYMCLK_CLOCK_CNTL),\
84 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\
85 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
Ddcn31_dccg.c87 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
91 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.h196 uint32_t PHYDSYMCLK_CLOCK_CNTL; member