Searched refs:PIXCLK_RESYNC_CNTL (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_clock_source.h | 42 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, id)
59 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
80 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
96 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
111 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
128 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
146 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
164 SRI(PIXCLK_RESYNC_CNTL, PHYPLL, pllid),\
207 uint32_t PIXCLK_RESYNC_CNTL; member
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| D | dce_clock_source.c | 833 REG_UPDATE_2(PIXCLK_RESYNC_CNTL, in dce112_program_pixel_clk_resync()
837 REG_UPDATE(PIXCLK_RESYNC_CNTL, in dce112_program_pixel_clk_resync()
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