1 /* 2 * Copyright 2020 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef SMU_11_5_0_PPSMC_H 25 #define SMU_11_5_0_PPSMC_H 26 27 // SMU Response Codes: 28 #define PPSMC_Result_OK 0x1 29 #define PPSMC_Result_Failed 0xFF 30 #define PPSMC_Result_UnknownCmd 0xFE 31 #define PPSMC_Result_CmdRejectedPrereq 0xFD 32 #define PPSMC_Result_CmdRejectedBusy 0xFC 33 34 // Message Definitions: 35 #define PPSMC_MSG_TestMessage 0x1 36 #define PPSMC_MSG_GetSmuVersion 0x2 37 #define PPSMC_MSG_GetDriverIfVersion 0x3 38 #define PPSMC_MSG_EnableGfxOff 0x4 39 #define PPSMC_MSG_DisableGfxOff 0x5 40 #define PPSMC_MSG_PowerDownIspByTile 0x6 // ISP is power gated by default 41 #define PPSMC_MSG_PowerUpIspByTile 0x7 42 #define PPSMC_MSG_PowerDownVcn 0x8 // VCN is power gated by default 43 #define PPSMC_MSG_PowerUpVcn 0x9 44 #define PPSMC_MSG_RlcPowerNotify 0xA 45 #define PPSMC_MSG_SetHardMinVcn 0xB // For wireless display 46 #define PPSMC_MSG_SetSoftMinGfxclk 0xC //Sets SoftMin for GFXCLK. Arg is in MHz 47 #define PPSMC_MSG_ActiveProcessNotify 0xD 48 #define PPSMC_MSG_SetHardMinIspiclkByFreq 0xE 49 #define PPSMC_MSG_SetHardMinIspxclkByFreq 0xF 50 #define PPSMC_MSG_SetDriverDramAddrHigh 0x10 51 #define PPSMC_MSG_SetDriverDramAddrLow 0x11 52 #define PPSMC_MSG_TransferTableSmu2Dram 0x12 53 #define PPSMC_MSG_TransferTableDram2Smu 0x13 54 #define PPSMC_MSG_GfxDeviceDriverReset 0x14 //mode 2 reset during TDR 55 #define PPSMC_MSG_GetEnabledSmuFeatures 0x15 56 #define PPSMC_MSG_spare1 0x16 57 #define PPSMC_MSG_SetHardMinSocclkByFreq 0x17 58 #define PPSMC_MSG_SetSoftMinFclk 0x18 //Used to be PPSMC_MSG_SetMinVideoFclkFreq 59 #define PPSMC_MSG_SetSoftMinVcn 0x19 60 #define PPSMC_MSG_EnablePostCode 0x1A 61 #define PPSMC_MSG_GetGfxclkFrequency 0x1B 62 #define PPSMC_MSG_GetFclkFrequency 0x1C 63 #define PPSMC_MSG_AllowGfxOff 0x1D 64 #define PPSMC_MSG_DisallowGfxOff 0x1E 65 #define PPSMC_MSG_SetSoftMaxGfxClk 0x1F 66 #define PPSMC_MSG_SetHardMinGfxClk 0x20 67 #define PPSMC_MSG_SetSoftMaxSocclkByFreq 0x21 68 #define PPSMC_MSG_SetSoftMaxFclkByFreq 0x22 69 #define PPSMC_MSG_SetSoftMaxVcn 0x23 70 #define PPSMC_MSG_spare2 0x24 71 #define PPSMC_MSG_SetPowerLimitPercentage 0x25 72 #define PPSMC_MSG_PowerDownJpeg 0x26 73 #define PPSMC_MSG_PowerUpJpeg 0x27 74 #define PPSMC_MSG_SetHardMinFclkByFreq 0x28 75 #define PPSMC_MSG_SetSoftMinSocclkByFreq 0x29 76 #define PPSMC_MSG_PowerUpCvip 0x2A 77 #define PPSMC_MSG_PowerDownCvip 0x2B 78 #define PPSMC_MSG_GetPptLimit 0x2C 79 #define PPSMC_MSG_GetThermalLimit 0x2D 80 #define PPSMC_MSG_GetCurrentTemperature 0x2E 81 #define PPSMC_MSG_GetCurrentPower 0x2F 82 #define PPSMC_MSG_GetCurrentVoltage 0x30 83 #define PPSMC_MSG_GetCurrentCurrent 0x31 84 #define PPSMC_MSG_GetAverageCpuActivity 0x32 85 #define PPSMC_MSG_GetAverageGfxActivity 0x33 86 #define PPSMC_MSG_GetAveragePower 0x34 87 #define PPSMC_MSG_GetAverageTemperature 0x35 88 #define PPSMC_MSG_SetAveragePowerTimeConstant 0x36 89 #define PPSMC_MSG_SetAverageActivityTimeConstant 0x37 90 #define PPSMC_MSG_SetAverageTemperatureTimeConstant 0x38 91 #define PPSMC_MSG_SetMitigationEndHysteresis 0x39 92 #define PPSMC_MSG_GetCurrentFreq 0x3A 93 #define PPSMC_MSG_SetReducedPptLimit 0x3B 94 #define PPSMC_MSG_SetReducedThermalLimit 0x3C 95 #define PPSMC_MSG_DramLogSetDramAddr 0x3D 96 #define PPSMC_MSG_StartDramLogging 0x3E 97 #define PPSMC_MSG_StopDramLogging 0x3F 98 #define PPSMC_MSG_SetSoftMinCclk 0x40 99 #define PPSMC_MSG_SetSoftMaxCclk 0x41 100 #define PPSMC_MSG_SetDfPstateActiveLevel 0x42 101 #define PPSMC_MSG_SetDfPstateSoftMinLevel 0x43 102 #define PPSMC_MSG_SetCclkPolicy 0x44 103 #define PPSMC_MSG_DramLogSetDramAddrHigh 0x45 104 #define PPSMC_MSG_DramLogSetDramBufferSize 0x46 105 #define PPSMC_MSG_RequestActiveWgp 0x47 106 #define PPSMC_MSG_QueryActiveWgp 0x48 107 #define PPSMC_MSG_SetFastPPTLimit 0x49 108 #define PPSMC_MSG_SetSlowPPTLimit 0x4A 109 #define PPSMC_MSG_GetFastPPTLimit 0x4B 110 #define PPSMC_MSG_GetSlowPPTLimit 0x4C 111 #define PPSMC_Message_Count 0x4D 112 113 //Argument for PPSMC_MSG_GfxDeviceDriverReset 114 enum { 115 MODE1_RESET = 1, 116 MODE2_RESET = 2 117 }; 118 119 #endif 120