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Searched refs:PhyCtrl (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/silan/
Dsc92031.c103 PhyCtrl = 0x60, // physical control enumerator
556 phy_ctrl = ioread32(port_base + PhyCtrl); in _sc92031_phy_reset()
579 iowrite32(phy_ctrl, port_base + PhyCtrl); in _sc92031_phy_reset()
583 iowrite32(phy_ctrl, port_base + PhyCtrl); in _sc92031_phy_reset()
1131 phy_ctrl = ioread32(port_base + PhyCtrl); in sc92031_ethtool_get_link_ksettings()
1243 old_phy_ctrl = ioread32(port_base + PhyCtrl); in sc92031_ethtool_set_link_ksettings()
1247 iowrite32(phy_ctrl, port_base + PhyCtrl); in sc92031_ethtool_set_link_ksettings()
/drivers/net/ethernet/dlink/
Ddl2k.c381 dw8(PhyCtrl, dr8(PhyCtrl) | psib[i]); in parse_eeprom()
1390 #define mii_delay() dr8(PhyCtrl)
1397 data = ((data) ? MII_DATA1 : 0) | (dr8(PhyCtrl) & 0xf8) | MII_WRITE; in mii_sendbit()
1398 dw8(PhyCtrl, data); in mii_sendbit()
1400 dw8(PhyCtrl, data | MII_CLK); in mii_sendbit()
1411 data = (dr8(PhyCtrl) & 0xf8) | MII_READ; in mii_getbit()
1412 dw8(PhyCtrl, data); in mii_getbit()
1414 dw8(PhyCtrl, data | MII_CLK); in mii_getbit()
1416 return (dr8(PhyCtrl) >> 1) & 1; in mii_getbit()
Ddl2k.h83 PhyCtrl = 0x76, enumerator
/drivers/net/usb/
Dpegasus.h66 PhyCtrl = 0x28, enumerator
Dpegasus.c185 set_register(p, PhyCtrl, 0); in __mii_op()
187 set_register(p, PhyCtrl, (indx | cmd)); in __mii_op()
189 ret = get_registers(p, PhyCtrl, 1, data); in __mii_op()
/drivers/net/ethernet/natsemi/
Dnatsemi.c295 PhyCtrl = 0xE4, enumerator
742 writew(target, ioaddr + PhyCtrl); in move_int_phy()
743 readw(ioaddr + PhyCtrl); in move_int_phy()