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Searched refs:REG_ADDR (Results 1 – 14 of 14) sorted by relevance

/drivers/mfd/
Dhtc-pasic3.c26 #define REG_ADDR 5 macro
38 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); in pasic3_write_register()
53 void __iomem *addr = asic->mapping + (REG_ADDR << bus_shift); in pasic3_read_register()
/drivers/hwmon/
Dultra45_env.c36 #define REG_ADDR 0x41UL macro
73 writeb(ireg, p->regs + REG_ADDR); in env_read()
83 writeb(ireg, p->regs + REG_ADDR); in env_write()
/drivers/net/ethernet/apm/xgene-v2/
Dmdio.c19 SET_REG_BITS(&val, REG_ADDR, reg); in xge_mdio_write()
43 SET_REG_BITS(&val, REG_ADDR, reg); in xge_mdio_read()
/drivers/net/ethernet/chelsio/cxgb/
Dmy3126.c35 #define OFFSET(REG_ADDR) (REG_ADDR << 2) argument
Dpm3393.c48 #define OFFSET(REG_ADDR) ((REG_ADDR) << 2) argument
/drivers/net/ethernet/apm/xgene/
Dxgene_enet_sgmac.h13 #define REG_ADDR(src) ((src) & GENMASK(4, 0)) macro
Dxgene_enet_sgmac.c119 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); in xgene_mii_phy_write()
140 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); in xgene_mii_phy_read()
/drivers/net/ethernet/qlogic/qed/
Dqed.h954 #define REG_ADDR(cdev, offset) (void __iomem *)((u8 __iomem *)\ macro
958 #define REG_RD(cdev, offset) readl(REG_ADDR(cdev, offset))
959 #define REG_WR(cdev, offset, val) writel((u32)val, REG_ADDR(cdev, offset))
960 #define REG_WR16(cdev, offset, val) writew((u16)val, REG_ADDR(cdev, offset))
Dqed_hw.c264 reg_addr = (u32 __iomem *)REG_ADDR(p_hwfn, hw_offset); in qed_memcpy_hw()
/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x.h169 #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) macro
171 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset))
172 #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset))
173 #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset))
176 writel_relaxed((u32)val, REG_ADDR(bp, offset))
179 writew_relaxed((u16)val, REG_ADDR(bp, offset))
181 #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset))
182 #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset))
183 #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset))
Dbnx2x_vfpf.c144 REG_ADDR(bp, PXP_VF_ADDR_CSDM_GLOBAL_START); in bnx2x_send_msg2pf()
/drivers/net/mdio/
Dmdio-xgene.c86 data = SET_VAL(PHY_ADDR, phy_id) | SET_VAL(REG_ADDR, reg); in xgene_mdio_rgmii_read()
112 val = SET_VAL(PHY_ADDR, phy_id) | SET_VAL(REG_ADDR, reg); in xgene_mdio_rgmii_write()
/drivers/gpu/drm/panel/
Dpanel-raspberrypi-touchscreen.c62 enum REG_ADDR { enum
/drivers/spi/
Dspi-meson-spifc.c23 #define REG_ADDR 0x04 macro