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Searched refs:REG_HDMI_PHY_QSERDES_COM_SYSCLK_EN_SEL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/hdmi/
Dhdmi.xml.h1081 #define REG_HDMI_PHY_QSERDES_COM_SYSCLK_EN_SEL 0x000000ac macro
Dhdmi_phy_8996.c443 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SYSCLK_EN_SEL, 0x37); in hdmi_8996_pll_set_clk_rate()