Home
last modified time | relevance | path

Searched refs:SMU7_MAX_LEVELS_LINK (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/radeon/
Dsmu7.h44 #define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. macro
Dsmu7_discrete.h325 SMU7_Discrete_LinkLevel LinkLevel [SMU7_MAX_LEVELS_LINK];
Dci_dpm.c3374 SMU7_MAX_LEVELS_LINK); in ci_setup_default_pcie_tables()
/drivers/gpu/drm/amd/pm/inc/
Dsmu7.h44 #define SMU7_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS // PCIe speed and number of lanes. macro
Dsmu7_discrete.h326 SMU7_Discrete_LinkLevel LinkLevel [SMU7_MAX_LEVELS_LINK];
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dci_smumgr.c2296 return SMU7_MAX_LEVELS_LINK; in ci_get_mac_definition()