Searched refs:UVD0_BASE (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | cyan_skillfish_reg_init.c | 42 adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i])); in cyan_skillfish_reg_base_init()
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| D | navi12_reg_init.c | 41 adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i])); in navi12_reg_base_init()
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| D | navi14_reg_init.c | 41 adev->reg_offset[VCN_HWIP][i] = (uint32_t *)(&(UVD0_BASE.instance[i])); in navi14_reg_base_init()
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| /drivers/gpu/drm/amd/include/ |
| D | cyan_skillfish_ip_offset.h | 129 static const struct IP_BASE UVD0_BASE ={ { { { 0x00007800, 0x00007E00, 0, 0, 0 } }, variable
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| D | navi12_ip_offset.h | 186 static const struct IP_BASE UVD0_BASE ={ { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0 } }, variable
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| D | navi14_ip_offset.h | 186 static const struct IP_BASE UVD0_BASE ={ { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0 } }, variable
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| D | renoir_ip_offset.h | 226 static const struct IP_BASE UVD0_BASE ={ { { { 0x00007800, 0x00007E00, 0x02403000, 0, 0 } }, variable
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