Searched refs:_aclk_core (Results 1 – 5 of 5) sorted by relevance
| /drivers/clk/rockchip/ |
| D | clk-rk3188.c | 115 #define RK3066_CLKSEL1(_aclk_core, _aclk_hclk, _aclk_pclk, _ahb2apb) \ argument
118 .val = HIWORD_UPDATE(_aclk_core, RK3066_DIV_ACLK_CORE_MASK, \
161 #define RK3188_CLKSEL1(_aclk_core) \ argument
164 .val = HIWORD_UPDATE(_aclk_core, RK3188_DIV_ACLK_CORE_MASK,\
167 #define RK3188_CPUCLK_RATE(_prate, _core_peri, _aclk_core) \ argument
172 RK3188_CLKSEL1(_aclk_core), \
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| D | clk-rk3328.c | 93 #define RK3328_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
96 .val = HIWORD_UPDATE(_aclk_core, RK3328_DIV_ACLKM_MASK, \
102 #define RK3328_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
106 RK3328_CLKSEL1(_aclk_core, _pclk_dbg), \
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| D | clk-px30.c | 78 #define PX30_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
81 .val = HIWORD_UPDATE(_aclk_core, PX30_DIV_ACLKM_MASK, \
87 #define PX30_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
91 PX30_CLKSEL0(_aclk_core, _pclk_dbg), \
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| D | clk-rk3308.c | 74 #define RK3308_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
77 .val = HIWORD_UPDATE(_aclk_core, RK3308_DIV_ACLKM_MASK, \
83 #define RK3308_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
87 RK3308_CLKSEL0(_aclk_core, _pclk_dbg), \
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| D | clk-rk3568.c | 116 #define RK3568_CLKSEL2(_aclk_core) \ argument
119 .val = HIWORD_UPDATE(_aclk_core, RK3568_DIV_ACLK_CORE_MASK, \
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