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/drivers/net/ethernet/intel/igbvf/
Dregs.h11 #define E1000_EITR(_n) (0x01680 + (0x4 * (_n))) argument
27 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \ argument
28 (0x0C000 + ((_n) * 0x40)))
29 #define E1000_RDBAH(_n) ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \ argument
30 (0x0C004 + ((_n) * 0x40)))
31 #define E1000_RDLEN(_n) ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \ argument
32 (0x0C008 + ((_n) * 0x40)))
33 #define E1000_SRRCTL(_n) ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \ argument
34 (0x0C00C + ((_n) * 0x40)))
35 #define E1000_RDH(_n) ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \ argument
[all …]
/drivers/net/ethernet/intel/igb/
De1000_regs.h31 #define E1000_EITR(_n) (0x01680 + (0x4 * (_n))) argument
99 #define E1000_SAQF(_n) (0x5980 + 4 * (_n)) argument
100 #define E1000_DAQF(_n) (0x59A0 + 4 * (_n)) argument
101 #define E1000_SPQF(_n) (0x59C0 + 4 * (_n)) argument
102 #define E1000_FTQF(_n) (0x59E0 + 4 * (_n)) argument
107 #define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */ argument
108 #define E1000_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */ argument
110 #define E1000_RQDPC(_n) (0x0C030 + ((_n) * 0x40)) argument
143 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) \ argument
144 : (0x0C000 + ((_n) * 0x40)))
[all …]
/drivers/net/ethernet/intel/e1000e/
Dregs.h82 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \ argument
83 (0x0C000 + ((_n) * 0x40)))
84 #define E1000_RDBAH(_n) ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \ argument
85 (0x0C004 + ((_n) * 0x40)))
86 #define E1000_RDLEN(_n) ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \ argument
87 (0x0C008 + ((_n) * 0x40)))
88 #define E1000_RDH(_n) ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \ argument
89 (0x0C010 + ((_n) * 0x40)))
90 #define E1000_RDT(_n) ((_n) < 4 ? (0x02818 + ((_n) * 0x100)) : \ argument
91 (0x0C018 + ((_n) * 0x40)))
[all …]
D82571.h17 #define E1000_EITR_82574(_n) (0x000E8 + (0x4 * (_n))) argument
/drivers/net/ethernet/intel/fm10k/
Dfm10k_type.h121 #define FM10K_MAXHOLDQ(_n) ((_n) + 0x0020) argument
124 #define FM10K_SM_AREA(_n) ((_n) + 0x0028) argument
127 #define FM10K_DGLORTMAP(_n) ((_n) + 0x0030) argument
133 #define FM10K_DGLORTDEC(_n) ((_n) + 0x0038) argument
143 #define FM10K_SWPRI_MAP(_n) ((_n) + 0x0050) argument
145 #define FM10K_RSSRK(_n, _m) (((_n) * 0x10) + (_m) + 0x0800) argument
148 #define FM10K_RETA(_n, _m) (((_n) * 0x20) + (_m) + 0x1000) argument
154 #define FM10K_TC_CREDIT(_n) ((_n) + 0x2000) argument
156 #define FM10K_TC_MAXCREDIT(_n) ((_n) + 0x2040) argument
158 #define FM10K_TC_RATE(_n) ((_n) + 0x2080) argument
[all …]
Dfm10k_mbx.h14 #define FM10K_MBMEM(_n) ((_n) + 0x18000) argument
15 #define FM10K_MBMEM_VF(_n, _m) (((_n) * 0x10) + (_m) + 0x18000) argument
16 #define FM10K_MBMEM_SM(_n) ((_n) + 0x18400) argument
17 #define FM10K_MBMEM_PF(_n) ((_n) + 0x18600) argument
20 #define FM10K_MBX(_n) ((_n) + 0x18800) argument
29 #define FM10K_MBICR(_n) ((_n) + 0x18840) argument
34 #define FM10K_VFMBMEM(_n) ((_n) + 0x00020) argument
202 #define FM10K_MBX_ERR(_n) ((_n) - 512) argument
/drivers/net/ethernet/intel/igc/
Digc_regs.h56 #define IGC_EITR(_n) (0x01680 + (0x4 * (_n))) argument
69 #define IGC_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */ argument
70 #define IGC_FHFT(_n) (0x09000 + (256 * (_n))) /* Flexible Host Filter */ argument
71 #define IGC_FHFT_EXT(_n) (0x09A00 + (256 * (_n))) /* Flexible Host Filter Extended */ argument
101 #define IGC_SRRCTL(_n) (0x0C00C + ((_n) * 0x40)) argument
103 #define IGC_RDBAL(_n) (0x0C000 + ((_n) * 0x40)) argument
104 #define IGC_RDBAH(_n) (0x0C004 + ((_n) * 0x40)) argument
105 #define IGC_RDLEN(_n) (0x0C008 + ((_n) * 0x40)) argument
106 #define IGC_RDH(_n) (0x0C010 + ((_n) * 0x40)) argument
107 #define IGC_RDT(_n) (0x0C018 + ((_n) * 0x40)) argument
[all …]
/drivers/net/wireless/ath/
Dreg.h43 #define AR_KEYTABLE(_n) (AR_KEYTABLE_0 + ((_n)*32)) argument
56 #define AR_KEYTABLE_KEY0(_n) (AR_KEYTABLE(_n) + 0) argument
57 #define AR_KEYTABLE_KEY1(_n) (AR_KEYTABLE(_n) + 4) argument
58 #define AR_KEYTABLE_KEY2(_n) (AR_KEYTABLE(_n) + 8) argument
59 #define AR_KEYTABLE_KEY3(_n) (AR_KEYTABLE(_n) + 12) argument
60 #define AR_KEYTABLE_KEY4(_n) (AR_KEYTABLE(_n) + 16) argument
61 #define AR_KEYTABLE_TYPE(_n) (AR_KEYTABLE(_n) + 20) argument
62 #define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24) argument
63 #define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28) argument
/drivers/scsi/aic94xx/
Daic94xx_dump.c202 #define PRINT_REG_8bit(_ha, _n, _r) asd_printk(STR_8BIT, #_n, _n, \ argument
204 #define PRINT_REG_16bit(_ha, _n, _r) asd_printk(STR_16BIT, #_n, _n, \ argument
206 #define PRINT_REG_32bit(_ha, _n, _r) asd_printk(STR_32BIT, #_n, _n, \ argument
209 #define PRINT_CREG_8bit(_ha, _n) asd_printk(STR_8BIT, #_n, _n, \ argument
210 asd_read_reg_byte(_ha, C##_n))
211 #define PRINT_CREG_16bit(_ha, _n) asd_printk(STR_16BIT, #_n, _n, \ argument
212 asd_read_reg_word(_ha, C##_n))
213 #define PRINT_CREG_32bit(_ha, _n) asd_printk(STR_32BIT, #_n, _n, \ argument
214 asd_read_reg_dword(_ha, C##_n))
220 #define PRINT_MREG_8bit(_ha, _m, _n, _r) asd_printk(MSTR_8BIT, _m, #_n, _n, \ argument
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/drivers/net/wireless/mediatek/mt76/mt7615/
Dregs.h110 #define MT_INT_RX_DONE(_n) BIT(_n) argument
113 #define MT_INT_TX_DONE(_n) BIT((_n) + 4) argument
224 #define MT_WF_PHY_RXTD(_n) (MT_WF_PHY_RXTD_BASE + ((_n) << 2)) argument
226 #define MT7663_WF_PHY_RXTD(_n) (MT_WF_PHY(0x25b0) + ((_n) << 2)) argument
236 #define MT_WF_PHY_RXTD2(_n) (MT_WF_PHY_RXTD2_BASE + ((_n) << 2)) argument
238 #define MT_WF_PHY_RFINTF3_0(_n) MT_WF_PHY(0x1100 + (_n) * 0x400) argument
262 #define MT_AGG_ARxCR_LIMIT_SHIFT(_n) (4 * (_n)) argument
263 #define MT_AGG_ARxCR_LIMIT(_n) GENMASK(2 + \ argument
264 MT_AGG_ARxCR_LIMIT_SHIFT(_n), \
265 MT_AGG_ARxCR_LIMIT_SHIFT(_n))
[all …]
/drivers/net/wireless/mediatek/mt76/
Dmt76x02_regs.h28 #define MT_EFUSE_DATA(_n) (MT_EFUSE_DATA_BASE + ((_n) << 2)) argument
109 #define MT_INT_RX_DONE(_n) BIT(_n) argument
112 #define MT_INT_TX_DONE(_n) BIT((_n) + 4) argument
143 #define MT_WMM_AIFSN_SHIFT(_n) ((_n) * 4) argument
147 #define MT_WMM_CWMIN_SHIFT(_n) ((_n) * 4) argument
151 #define MT_WMM_CWMAX_SHIFT(_n) ((_n) * 4) argument
154 #define MT_WMM_TXOP(_n) (MT_WMM_TXOP_BASE + (((_n) / 2) << 2)) argument
155 #define MT_WMM_TXOP_SHIFT(_n) (((_n) & 1) * 16) argument
194 #define MT_BCN_OFFSET(_n) (MT_BCN_OFFSET_BASE + ((_n) << 2)) argument
226 #define MT_LED_CTRL_REPLAY(_n) BIT(0 + (8 * (_n))) argument
[all …]
/drivers/net/wireless/mediatek/mt7601u/
Dregs.h31 #define MT_EFUSE_DATA(_n) (MT_EFUSE_DATA_BASE + ((_n) << 2)) argument
87 #define MT_INT_RX_DONE(_n) BIT(_n) argument
90 #define MT_INT_TX_DONE(_n) BIT(_n + 4) argument
121 #define MT_WMM_AIFSN_SHIFT(_n) ((_n) * 4) argument
125 #define MT_WMM_CWMIN_SHIFT(_n) ((_n) * 4) argument
129 #define MT_WMM_CWMAX_SHIFT(_n) ((_n) * 4) argument
132 #define MT_WMM_TXOP(_n) (MT_WMM_TXOP_BASE + (((_n) / 2) << 2)) argument
133 #define MT_WMM_TXOP_SHIFT(_n) ((_n & 1) * 16) argument
185 #define MT_BCN_OFFSET(_n) (MT_BCN_OFFSET_BASE + ((_n) << 2)) argument
278 #define MT_WCID_DROP(_n) (MT_WCID_DROP_BASE + ((_n) >> 5) * 4) argument
[all …]
/drivers/net/wireless/mediatek/mt76/mt7603/
Dregs.h28 #define MT_INT_RX_DONE(_n) BIT(_n) argument
31 #define MT_INT_TX_DONE(_n) BIT((_n) + 4) argument
189 #define MT_AGG_ARxCR_LIMIT_SHIFT(_n) (4 * (_n)) argument
190 #define MT_AGG_ARxCR_LIMIT(_n) GENMASK(2 + \ argument
191 MT_AGG_ARxCR_LIMIT_SHIFT(_n), \
192 MT_AGG_ARxCR_LIMIT_SHIFT(_n))
196 #define MT_AGG_LIMIT_AC(_n) GENMASK(((_n) + 1) * 8 - 1, (_n) * 8) argument
272 #define MT_WMM_AIFSN_SHIFT(_n) ((_n) * 4) argument
275 #define MT_WMM_CWMAX(_n) (MT_WMM_CWMAX_BASE + (((_n) / 2) << 2)) argument
276 #define MT_WMM_CWMAX_SHIFT(_n) (((_n) & 1) * 16) argument
[all …]
/drivers/net/wireless/ath/ath5k/
Dreg.h833 #define AR5K_DCU_TX_FILTER_0(_n) (AR5K_DCU_TX_FILTER_0_BASE + (_n * 64)) argument
839 #define AR5K_DCU_TX_FILTER_1(_n) (AR5K_DCU_TX_FILTER_1_BASE + (_n * 64)) argument
1758 #define AR5K_MIC_QOS_CTL_OFF(_n) (1 << (_n * 2)) argument
1765 #define AR5K_MIC_QOS_SEL_OFF(_n) (1 << (_n * 4)) argument
1812 #define AR5K_RATE_ACKSIFS(_n) (AR5K_RATE_ACKSIFS_BSE + ((_n) << 2)) argument
1820 #define AR5K_RATE_DUR(_n) (AR5K_RATE_DUR_BASE + ((_n) << 2)) argument
1827 #define AR5K_RATE2DB(_n) (AR5K_RATE2DB_BASE + ((_n) << 2)) argument
1834 #define AR5K_DB2RATE(_n) (AR5K_DB2RATE_BASE + ((_n) << 2)) argument
1847 #define AR5K_PHY(_n) (AR5K_PHY_BASE + ((_n) << 2)) argument
2027 #define AR5K_PHY_NF_SVAL(_n) (((_n) & AR5K_PHY_NF_M) | (1 << 9)) argument
[all …]
Drfbuffer.h178 #define AR5K_RF5111_PWD(_n) { 1, (135 - _n), 3 } argument
296 #define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 } argument
402 #define AR5K_RF5112A_PWD(_n) { 1, (306 - _n), 3 } argument
/drivers/net/wireless/mediatek/mt76/mt7921/
Dregs.h25 #define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n)) argument
165 #define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, 0x05c + (_n) * 4) argument
166 #define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, 0x06c + (_n) * 4) argument
200 #define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, 0x194 + (_n) * 4) argument
418 #define MT_DMASHDL_GROUP_QUOTA(_n) MT_DMA_SHDL(0x020 + ((_n) << 2)) argument
422 #define MT_DMASHDL_Q_MAP(_n) MT_DMA_SHDL(0x060 + ((_n) << 2)) argument
424 #define MT_DMASHDL_Q_MAP_SHIFT(_n) (4 * ((_n) % 8)) argument
426 #define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2)) argument
/drivers/gpu/drm/sun4i/
Dsun4i_hdmi_ddc_clk.c34 u8 best_m = 0, best_n = 0, _m, _n; in sun4i_ddc_calc_divider() local
37 for (_n = 0; _n < 8; _n++) { in sun4i_ddc_calc_divider()
40 tmp_rate = (((parent_rate / pre_div) / 10) >> _n) / in sun4i_ddc_calc_divider()
49 best_n = _n; in sun4i_ddc_calc_divider()
/drivers/clk/sunxi-ng/
Dccu_nk.c23 unsigned int _k, _n; in ccu_nk_find_best() local
26 for (_n = nk->min_n; _n <= nk->max_n; _n++) { in ccu_nk_find_best()
27 unsigned long tmp_rate = parent * _n * _k; in ccu_nk_find_best()
35 best_n = _n; in ccu_nk_find_best()
Dccu_nkm.c24 unsigned long _n, _k, _m; in ccu_nkm_find_best() local
27 for (_n = nkm->min_n; _n <= nkm->max_n; _n++) { in ccu_nkm_find_best()
31 tmp_rate = parent * _n * _k / _m; in ccu_nkm_find_best()
37 best_n = _n; in ccu_nkm_find_best()
Dccu_nkmp.c37 unsigned long _n, _k, _m, _p; in ccu_nkmp_find_best() local
40 for (_n = nkmp->min_n; _n <= nkmp->max_n; _n++) { in ccu_nkmp_find_best()
46 _n, _k, in ccu_nkmp_find_best()
54 best_n = _n; in ccu_nkmp_find_best()
Dccu_nm.c35 unsigned long _n, _m; in ccu_nm_find_best() local
37 for (_n = nm->min_n; _n <= nm->max_n; _n++) { in ccu_nm_find_best()
40 _n, _m); in ccu_nm_find_best()
47 best_n = _n; in ccu_nm_find_best()
/drivers/net/wireless/intel/iwlwifi/
Diwl-prph.h193 #define SCD_QUEUE_CTX_REG1_VAL(_n, _v) FIELD_PREP(SCD_QUEUE_CTX_REG1_ ## _n, _v) argument
197 #define SCD_QUEUE_CTX_REG2_VAL(_n, _v) FIELD_PREP(SCD_QUEUE_CTX_REG2_ ## _n, _v) argument
/drivers/net/wireless/ath/ath9k/
Dphy.h25 #define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) argument
/drivers/clk/meson/
Dclk-pll.h24 #define PLL_PARAMS(_m, _n) \ argument
27 .n = (_n), \
/drivers/clk/renesas/
Dr9a06g032-clocks.c64 #define D_GATE(_idx, _n, _src, ...) \ argument
66 .source = 1 + R9A06G032_##_src, .name = _n, \
68 #define D_MODULE(_idx, _n, _src, ...) \ argument
70 .source = 1 + R9A06G032_##_src, .name = _n, \
72 #define D_ROOT(_idx, _n, _mul, _div) \ argument
73 { .type = K_FFC, .index = R9A06G032_##_idx, .name = _n, \
75 #define D_FFC(_idx, _n, _src, _div) \ argument
77 .source = 1 + R9A06G032_##_src, .name = _n, \
79 #define D_DIV(_idx, _n, _src, _reg, _min, _max, ...) \ argument
81 .source = 1 + R9A06G032_##_src, .name = _n, \
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