Home
last modified time | relevance | path

Searched refs:_pwr_reg (Results 1 – 13 of 13) sorted by relevance

/drivers/clk/mediatek/
Dclk-mt7629.c24 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
30 .pwr_reg = _pwr_reg, \
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
48 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt6797.c615 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
621 .pwr_reg = _pwr_reg, \
635 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
638 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt7622.c24 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
30 .pwr_reg = _pwr_reg, \
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
48 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
Dclk-mt8516.c736 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
742 .pwr_reg = _pwr_reg, \
756 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
759 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt6779.c1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1153 .pwr_reg = _pwr_reg, \
1172 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1177 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8167.c982 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
988 .pwr_reg = _pwr_reg, \
1002 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1005 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8173.c938 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
944 .pwr_reg = _pwr_reg, \
958 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
961 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8183.c1067 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1075 .pwr_reg = _pwr_reg, \
1094 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1099 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt2712.c1166 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1173 .pwr_reg = _pwr_reg, \
1189 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1192 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8192.c1120 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1128 .pwr_reg = _pwr_reg, \
1148 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1152 PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt6765.c716 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
722 .pwr_reg = _pwr_reg, \
740 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
744 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8135.c596 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
600 .pwr_reg = _pwr_reg, \
Dclk-mt2701.c926 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
931 .pwr_reg = _pwr_reg, \