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Searched refs:adev_to_drm (Results 1 – 25 of 41) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Damdgpu_debugfs.c113 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
115 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
121 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
128 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
129 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
178 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
179 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_process_reg_op()
226 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_debugfs_regs_pcie_read()
228 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_regs_pcie_read()
234 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_debugfs_regs_pcie_read()
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Damdgpu_vkms.c486 adev_to_drm(adev)->max_vblank_count = 0; in amdgpu_vkms_sw_init()
488 adev_to_drm(adev)->mode_config.funcs = &amdgpu_vkms_mode_funcs; in amdgpu_vkms_sw_init()
490 adev_to_drm(adev)->mode_config.max_width = XRES_MAX; in amdgpu_vkms_sw_init()
491 adev_to_drm(adev)->mode_config.max_height = YRES_MAX; in amdgpu_vkms_sw_init()
493 adev_to_drm(adev)->mode_config.preferred_depth = 24; in amdgpu_vkms_sw_init()
494 adev_to_drm(adev)->mode_config.prefer_shadow = 1; in amdgpu_vkms_sw_init()
496 adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base; in amdgpu_vkms_sw_init()
508 r = amdgpu_vkms_output_init(adev_to_drm(adev), &adev->amdgpu_vkms_output[i], i); in amdgpu_vkms_sw_init()
513 drm_kms_helper_poll_init(adev_to_drm(adev)); in amdgpu_vkms_sw_init()
531 drm_kms_helper_poll_fini(adev_to_drm(adev)); in amdgpu_vkms_sw_fini()
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Damdgpu_fb.c138 info = drm_get_format_info(adev_to_drm(adev), mode_cmd); in amdgpufb_create_pinned_object()
234 ret = amdgpu_display_gem_fb_init(adev_to_drm(adev), &rfbdev->rfb, in amdgpufb_create()
256 info->apertures->ranges[0].base = adev_to_drm(adev)->mode_config.fb_base; in amdgpufb_create()
320 if (list_empty(&adev_to_drm(adev)->mode_config.connector_list)) in amdgpu_fbdev_init()
334 drm_fb_helper_prepare(adev_to_drm(adev), &rfbdev->helper, in amdgpu_fbdev_init()
337 ret = drm_fb_helper_init(adev_to_drm(adev), &rfbdev->helper); in amdgpu_fbdev_init()
346 drm_helper_disable_unused_functions(adev_to_drm(adev)); in amdgpu_fbdev_init()
357 amdgpu_fbdev_destroy(adev_to_drm(adev), adev->mode_info.rfbdev); in amdgpu_fbdev_fini()
Damdgpu_irq.c123 struct drm_device *dev = adev_to_drm(adev); in amdgpu_hotplug_work_func()
337 adev_to_drm(adev)->vblank_disable_immediate = true; in amdgpu_irq_init()
339 r = drm_vblank_init(adev_to_drm(adev), adev->mode_info.num_crtc); in amdgpu_irq_init()
359 r = request_irq(irq, amdgpu_irq_handler, IRQF_SHARED, adev_to_drm(adev)->driver->name, in amdgpu_irq_init()
360 adev_to_drm(adev)); in amdgpu_irq_init()
368 adev_to_drm(adev)->max_vblank_count = 0x00ffffff; in amdgpu_irq_init()
378 free_irq(adev->irq.irq, adev_to_drm(adev)); in amdgpu_irq_fini_hw()
Damdgpu_fence.c178 pm_runtime_get_noresume(adev_to_drm(adev)->dev); in amdgpu_fence_emit()
308 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_fence_process()
309 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_fence_process()
564 if (!drm_dev_is_unplugged(adev_to_drm(adev)) && in amdgpu_fence_driver_hw_fini()
792 struct drm_device *dev = adev_to_drm(adev); in gpu_recover_get()
818 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_fence_init()
Damdgpu_rap.c49 struct drm_device *dev = adev_to_drm(adev); in amdgpu_rap_debugfs_write()
120 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_rap_debugfs_init()
Damdgpu_dma_buf.c67 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_dma_buf_attach()
74 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_dma_buf_attach()
93 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_dma_buf_detach()
94 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_dma_buf_detach()
Damdgpu_display.c97 (amdgpu_display_get_crtc_scanoutpos(adev_to_drm(adev), work->crtc_id, 0, in amdgpu_display_flip_work_func()
1254 drm_property_create_range(adev_to_drm(adev), 0, "coherent", 0, 1); in amdgpu_display_modeset_create_props()
1259 drm_property_create_range(adev_to_drm(adev), 0, "load detection", 0, 1); in amdgpu_display_modeset_create_props()
1263 drm_mode_create_scaling_mode_property(adev_to_drm(adev)); in amdgpu_display_modeset_create_props()
1267 drm_property_create_enum(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props()
1272 drm_property_create_range(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props()
1278 drm_property_create_range(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props()
1285 drm_property_create_enum(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props()
1291 drm_property_create_enum(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props()
1297 drm_property_create_range(adev_to_drm(adev), 0, in amdgpu_display_modeset_create_props()
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Damdgpu_securedisplay.c97 struct drm_device *dev = adev_to_drm(adev); in amdgpu_securedisplay_debugfs_write()
176 debugfs_create_file("securedisplay_test", S_IWUSR, adev_to_drm(adev)->primary->debugfs_root, in amdgpu_securedisplay_debugfs_init()
Ddce_v8_0.c277 struct drm_device *dev = adev_to_drm(adev); in dce_v8_0_hpd_init()
322 struct drm_device *dev = adev_to_drm(adev); in dce_v8_0_hpd_fini()
2612 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v8_0_crtc_funcs); in dce_v8_0_crtc_init()
2620 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v8_0_crtc_init()
2621 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v8_0_crtc_init()
2692 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v8_0_sw_init()
2694 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v8_0_sw_init()
2696 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v8_0_sw_init()
2697 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v8_0_sw_init()
2699 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v8_0_sw_init()
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Ddce_v6_0.c283 struct drm_device *dev = adev_to_drm(adev); in dce_v6_0_hpd_init()
328 struct drm_device *dev = adev_to_drm(adev); in dce_v6_0_hpd_fini()
2593 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v6_0_crtc_funcs); in dce_v6_0_crtc_init()
2601 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v6_0_crtc_init()
2602 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v6_0_crtc_init()
2671 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v6_0_sw_init()
2672 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v6_0_sw_init()
2673 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v6_0_sw_init()
2674 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v6_0_sw_init()
2675 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v6_0_sw_init()
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Ddce_v10_0.c332 struct drm_device *dev = adev_to_drm(adev); in dce_v10_0_hpd_init()
387 struct drm_device *dev = adev_to_drm(adev); in dce_v10_0_hpd_fini()
2700 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v10_0_crtc_funcs); in dce_v10_0_crtc_init()
2708 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v10_0_crtc_init()
2709 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v10_0_crtc_init()
2791 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v10_0_sw_init()
2793 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v10_0_sw_init()
2795 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v10_0_sw_init()
2796 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v10_0_sw_init()
2798 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v10_0_sw_init()
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Damdgpu_acpi.c455 pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_atif_handler()
457 drm_helper_hpd_irq_event(adev_to_drm(adev)); in amdgpu_atif_handler()
458 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_atif_handler()
459 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_atif_handler()
864 list_for_each_entry(tmp, &adev_to_drm(adev)->mode_config.encoder_list, in amdgpu_acpi_init()
Ddce_v11_0.c350 struct drm_device *dev = adev_to_drm(adev); in dce_v11_0_hpd_init()
404 struct drm_device *dev = adev_to_drm(adev); in dce_v11_0_hpd_fini()
2805 drm_crtc_init(adev_to_drm(adev), &amdgpu_crtc->base, &dce_v11_0_crtc_funcs); in dce_v11_0_crtc_init()
2813 adev_to_drm(adev)->mode_config.cursor_width = amdgpu_crtc->max_cursor_width; in dce_v11_0_crtc_init()
2814 adev_to_drm(adev)->mode_config.cursor_height = amdgpu_crtc->max_cursor_height; in dce_v11_0_crtc_init()
2909 adev_to_drm(adev)->mode_config.funcs = &amdgpu_mode_funcs; in dce_v11_0_sw_init()
2911 adev_to_drm(adev)->mode_config.async_page_flip = true; in dce_v11_0_sw_init()
2913 adev_to_drm(adev)->mode_config.max_width = 16384; in dce_v11_0_sw_init()
2914 adev_to_drm(adev)->mode_config.max_height = 16384; in dce_v11_0_sw_init()
2916 adev_to_drm(adev)->mode_config.preferred_depth = 24; in dce_v11_0_sw_init()
[all …]
Damdgpu_fw_attestation.c140 adev_to_drm(adev)->primary->debugfs_root, in amdgpu_fw_attestation_debugfs_init()
Damdgpu_device.c2139 struct drm_device *dev = adev_to_drm(adev); in amdgpu_device_ip_early_init()
3398 adev->asic_reset_res = amdgpu_device_baco_enter(adev_to_drm(adev)); in amdgpu_device_xgmi_reset_func()
3404 adev->asic_reset_res = amdgpu_device_baco_exit(adev_to_drm(adev)); in amdgpu_device_xgmi_reset_func()
3421 adev->asic_reset_res, adev_to_drm(adev)->unique); in amdgpu_device_xgmi_reset_func()
3515 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_device_init()
3782 drm_mode_config_init(adev_to_drm(adev)); in amdgpu_device_init()
3974 if (!drm_drv_uses_atomic_modeset(adev_to_drm(adev))) in amdgpu_device_fini_hw()
3975 drm_helper_force_disable_all(adev_to_drm(adev)); in amdgpu_device_fini_hw()
3977 drm_atomic_helper_shutdown(adev_to_drm(adev)); in amdgpu_device_fini_hw()
4017 if (amdgpu_device_supports_px(adev_to_drm(adev))) { in amdgpu_device_fini_sw()
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Damdgpu_amdkfd.c128 .drm_render_minor = adev_to_drm(adev)->render->index, in amdgpu_amdkfd_device_init()
170 adev_to_drm(adev), &gpu_resources); in amdgpu_amdkfd_device_init()
497 if (obj->dev->driver != adev_to_drm(adev)->driver) in amdgpu_amdkfd_get_dmabuf_info()
Damdgpu_gem.c131 struct drm_device *ddev = adev_to_drm(adev); in amdgpu_gem_force_release()
923 struct drm_device *dev = adev_to_drm(adev); in amdgpu_debugfs_gem_info_show()
968 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_gem_init()
Damdgpu_ring.c422 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_ring_init()
Damdgpu_ib.c460 struct drm_minor *minor = adev_to_drm(adev)->primary; in amdgpu_debugfs_sa_init()
Daldebaran.c170 r, adev_to_drm(tmp_adev)->unique); in aldebaran_mode2_perform_reset()
/drivers/gpu/drm/amd/pm/
Damdgpu_pm.c1730 adev_to_drm(adev)->unique, in amdgpu_get_thermal_throttling_logging()
1980 !amdgpu_device_supports_smart_shift(adev_to_drm(adev))) in ss_power_attr_update()
1997 if (!amdgpu_device_supports_smart_shift(adev_to_drm(adev))) in ss_bias_attr_update()
2249 r = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp()
2251 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp()
2276 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp()
2277 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_show_temp()
2384 ret = pm_runtime_get_sync(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
2386 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
2391 pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); in amdgpu_hwmon_get_pwm1_enable()
[all …]
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm.c314 struct drm_device *dev = adev_to_drm(adev); in get_crtc_by_otg_inst()
411 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); in dm_pflip_high_irq()
419 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_pflip_high_irq()
469 list_add_tail(&e->base.link, &adev_to_drm(adev)->vblank_event_list); in dm_pflip_high_irq()
482 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_pflip_high_irq()
532 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); in dm_vupdate_high_irq()
542 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_vupdate_high_irq()
591 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); in dm_crtc_high_irq()
626 spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags); in dm_crtc_high_irq()
1471 adev->dm.ddev = adev_to_drm(adev); in amdgpu_dm_init()
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Damdgpu_dm_irq.c885 struct drm_device *dev = adev_to_drm(adev); in amdgpu_dm_hpd_init()
921 struct drm_device *dev = adev_to_drm(adev); in amdgpu_dm_hpd_fini()
Damdgpu_dm_debugfs.c2951 spin_lock_irq(&adev_to_drm(adev)->event_lock); in crc_win_update_set()
2975 spin_unlock_irq(&adev_to_drm(adev)->event_lock); in crc_win_update_set()
3078 struct drm_device *dev = adev_to_drm(adev); in mst_topo_show()
3112 struct drm_device *dev = adev_to_drm(adev); in trigger_hpd_mst_set()
3179 amdgpu_dm_trigger_timing_sync(adev_to_drm(adev)); in force_timing_sync_set()
3337 struct drm_minor *minor = adev_to_drm(adev)->primary; in dtn_debugfs_init()

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