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Searched refs:amdgpu_device (Results 1 – 25 of 368) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Damdgpu_nbio.h51 void (*handle_ras_controller_intr_no_bifring)(struct amdgpu_device *adev);
52 void (*handle_ras_err_event_athub_intr_no_bifring)(struct amdgpu_device *adev);
53 int (*init_ras_controller_interrupt)(struct amdgpu_device *adev);
54 int (*init_ras_err_event_athub_interrupt)(struct amdgpu_device *adev);
55 void (*query_ras_error_count)(struct amdgpu_device *adev,
57 int (*ras_late_init)(struct amdgpu_device *adev);
58 void (*ras_fini)(struct amdgpu_device *adev);
63 u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
64 u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
65 u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
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Damdgpu.h117 struct amdgpu_device *adev;
277 struct amdgpu_device;
326 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
328 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
330 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
359 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
364 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
367 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
373 bool amdgpu_get_bios(struct amdgpu_device *adev);
374 bool amdgpu_read_bios(struct amdgpu_device *adev);
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Damdgpu_gfx.h209 int (*ras_late_init)(struct amdgpu_device *adev);
210 void (*ras_fini)(struct amdgpu_device *adev);
211 int (*ras_error_inject)(struct amdgpu_device *adev,
213 int (*query_ras_error_count)(struct amdgpu_device *adev,
215 void (*reset_ras_error_count)(struct amdgpu_device *adev);
216 void (*query_ras_error_status)(struct amdgpu_device *adev);
217 void (*reset_ras_error_status)(struct amdgpu_device *adev);
218 void (*enable_watchdog_timer)(struct amdgpu_device *adev);
223 uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);
224 void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num,
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Damdgpu_atombios.h136 amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
139 struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev,
141 void amdgpu_atombios_i2c_init(struct amdgpu_device *adev);
143 bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev);
145 bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev);
147 int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev);
149 int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev);
151 int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev);
153 bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev,
157 int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev,
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Damdgpu_mmhub.h25 int (*ras_late_init)(struct amdgpu_device *adev);
26 void (*ras_fini)(struct amdgpu_device *adev);
27 void (*query_ras_error_count)(struct amdgpu_device *adev,
29 void (*query_ras_error_status)(struct amdgpu_device *adev);
30 void (*reset_ras_error_count)(struct amdgpu_device *adev);
31 void (*reset_ras_error_status)(struct amdgpu_device *adev);
35 u64 (*get_fb_location)(struct amdgpu_device *adev);
36 void (*init)(struct amdgpu_device *adev);
37 int (*gart_enable)(struct amdgpu_device *adev);
38 void (*set_fault_enable_default)(struct amdgpu_device *adev,
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Damdgpu_gmc.h78 void (*print_l2_protection_fault_status)(struct amdgpu_device *adev,
112 void (*flush_gpu_tlb)(struct amdgpu_device *adev, uint32_t vmid,
115 int (*flush_gpu_tlb_pasid)(struct amdgpu_device *adev, uint16_t pasid,
124 void (*set_prt)(struct amdgpu_device *adev, bool enable);
126 uint64_t (*map_mtype)(struct amdgpu_device *adev, uint32_t flags);
128 void (*get_vm_pde)(struct amdgpu_device *adev, int level,
131 void (*get_vm_pte)(struct amdgpu_device *adev,
135 unsigned int (*get_vbios_fb_size)(struct amdgpu_device *adev);
139 int (*ras_late_init)(struct amdgpu_device *adev);
140 void (*ras_fini)(struct amdgpu_device *adev);
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Damdgpu_amdkfd.c66 void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev) in amdgpu_amdkfd_device_probe()
93 static void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev, in amdgpu_doorbell_get_kfd_info()
113 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev) in amdgpu_amdkfd_device_init()
174 void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev) in amdgpu_amdkfd_device_fini_sw()
182 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev, in amdgpu_amdkfd_interrupt()
189 void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool run_pm) in amdgpu_amdkfd_suspend()
195 int amdgpu_amdkfd_resume_iommu(struct amdgpu_device *adev) in amdgpu_amdkfd_resume_iommu()
205 int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool run_pm) in amdgpu_amdkfd_resume()
215 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev) in amdgpu_amdkfd_pre_reset()
225 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev) in amdgpu_amdkfd_post_reset()
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Damdgpu_rlc.h118 bool (*is_rlc_enabled)(struct amdgpu_device *adev);
119 void (*set_safe_mode)(struct amdgpu_device *adev);
120 void (*unset_safe_mode)(struct amdgpu_device *adev);
121 int (*init)(struct amdgpu_device *adev);
122 u32 (*get_csb_size)(struct amdgpu_device *adev);
123 void (*get_csb_buffer)(struct amdgpu_device *adev, volatile u32 *buffer);
124 int (*get_cp_table_num)(struct amdgpu_device *adev);
125 int (*resume)(struct amdgpu_device *adev);
126 void (*stop)(struct amdgpu_device *adev);
127 void (*reset)(struct amdgpu_device *adev);
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Damdgpu_irq.h39 struct amdgpu_device;
73 int (*set)(struct amdgpu_device *adev, struct amdgpu_irq_src *source,
76 int (*process)(struct amdgpu_device *adev,
103 void amdgpu_irq_disable_all(struct amdgpu_device *adev);
105 int amdgpu_irq_init(struct amdgpu_device *adev);
106 void amdgpu_irq_fini_sw(struct amdgpu_device *adev);
107 void amdgpu_irq_fini_hw(struct amdgpu_device *adev);
108 int amdgpu_irq_add_id(struct amdgpu_device *adev,
111 void amdgpu_irq_dispatch(struct amdgpu_device *adev,
113 void amdgpu_irq_delegate(struct amdgpu_device *adev,
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Dvce_v2_0.c45 static void vce_v2_0_set_ring_funcs(struct amdgpu_device *adev);
46 static void vce_v2_0_set_irq_funcs(struct amdgpu_device *adev);
57 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_get_wptr()
91 struct amdgpu_device *adev = ring->adev; in vce_v2_0_ring_set_wptr()
99 static int vce_v2_0_lmi_clean(struct amdgpu_device *adev) in vce_v2_0_lmi_clean()
116 static int vce_v2_0_firmware_loaded(struct amdgpu_device *adev) in vce_v2_0_firmware_loaded()
142 static void vce_v2_0_disable_cg(struct amdgpu_device *adev) in vce_v2_0_disable_cg()
147 static void vce_v2_0_init_cg(struct amdgpu_device *adev) in vce_v2_0_init_cg()
168 static void vce_v2_0_mc_resume(struct amdgpu_device *adev) in vce_v2_0_mc_resume()
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Dsi_ih.c33 static void si_ih_set_interrupt_funcs(struct amdgpu_device *adev);
35 static void si_ih_enable_interrupts(struct amdgpu_device *adev) in si_ih_enable_interrupts()
47 static void si_ih_disable_interrupts(struct amdgpu_device *adev) in si_ih_disable_interrupts()
62 static int si_ih_irq_init(struct amdgpu_device *adev) in si_ih_irq_init()
101 static void si_ih_irq_disable(struct amdgpu_device *adev) in si_ih_irq_disable()
107 static u32 si_ih_get_wptr(struct amdgpu_device *adev, in si_ih_get_wptr()
126 static void si_ih_decode_iv(struct amdgpu_device *adev, in si_ih_decode_iv()
147 static void si_ih_set_rptr(struct amdgpu_device *adev, in si_ih_set_rptr()
155 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_early_init()
165 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in si_ih_sw_init()
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Dcik_ih.c51 static void cik_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cik_ih_enable_interrupts(struct amdgpu_device *adev) in cik_ih_enable_interrupts()
79 static void cik_ih_disable_interrupts(struct amdgpu_device *adev) in cik_ih_disable_interrupts()
106 static int cik_ih_irq_init(struct amdgpu_device *adev) in cik_ih_irq_init()
169 static void cik_ih_irq_disable(struct amdgpu_device *adev) in cik_ih_irq_disable()
188 static u32 cik_ih_get_wptr(struct amdgpu_device *adev, in cik_ih_get_wptr()
242 static void cik_ih_decode_iv(struct amdgpu_device *adev, in cik_ih_decode_iv()
274 static void cik_ih_set_rptr(struct amdgpu_device *adev, in cik_ih_set_rptr()
282 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_early_init()
297 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cik_ih_sw_init()
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Dtonga_ih.c51 static void tonga_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void tonga_ih_enable_interrupts(struct amdgpu_device *adev) in tonga_ih_enable_interrupts()
77 static void tonga_ih_disable_interrupts(struct amdgpu_device *adev) in tonga_ih_disable_interrupts()
102 static int tonga_ih_irq_init(struct amdgpu_device *adev) in tonga_ih_irq_init()
172 static void tonga_ih_irq_disable(struct amdgpu_device *adev) in tonga_ih_irq_disable()
192 static u32 tonga_ih_get_wptr(struct amdgpu_device *adev, in tonga_ih_get_wptr()
236 static void tonga_ih_decode_iv(struct amdgpu_device *adev, in tonga_ih_decode_iv()
268 static void tonga_ih_set_rptr(struct amdgpu_device *adev, in tonga_ih_set_rptr()
282 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_early_init()
297 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in tonga_ih_sw_init()
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Damdgpu_virt.h71 int (*req_full_gpu)(struct amdgpu_device *adev, bool init);
72 int (*rel_full_gpu)(struct amdgpu_device *adev, bool init);
73 int (*req_init_data)(struct amdgpu_device *adev);
74 int (*reset_gpu)(struct amdgpu_device *adev);
75 int (*wait_reset)(struct amdgpu_device *adev);
76 void (*trans_msg)(struct amdgpu_device *adev, enum idh_request req,
304 bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev);
305 void amdgpu_virt_init_setting(struct amdgpu_device *adev);
306 void amdgpu_virt_kiq_reg_write_reg_wait(struct amdgpu_device *adev,
309 int amdgpu_virt_request_full_gpu(struct amdgpu_device *adev, bool init);
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Djpeg_v3_0.c37 static void jpeg_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev);
38 static void jpeg_v3_0_set_irq_funcs(struct amdgpu_device *adev);
51 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_early_init()
77 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_sw_init()
119 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_sw_fini()
139 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_hw_init()
164 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_hw_fini()
184 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_suspend()
205 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in jpeg_v3_0_resume()
217 static void jpeg_v3_0_disable_clock_gating(struct amdgpu_device *adev) in jpeg_v3_0_disable_clock_gating()
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Damdgpu_ras.h331 struct amdgpu_device *adev;
375 typedef int (*ras_ih_cb)(struct amdgpu_device *adev,
401 struct amdgpu_device *adev;
480 static inline int amdgpu_ras_is_supported(struct amdgpu_device *adev, in amdgpu_ras_is_supported()
490 int amdgpu_ras_recovery_init(struct amdgpu_device *adev);
491 int amdgpu_ras_request_reset_on_boot(struct amdgpu_device *adev,
494 void amdgpu_ras_resume(struct amdgpu_device *adev);
495 void amdgpu_ras_suspend(struct amdgpu_device *adev);
497 int amdgpu_ras_query_error_count(struct amdgpu_device *adev,
502 int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,
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Damdgpu_atomfirmware.h29 uint32_t amdgpu_atomfirmware_query_firmware_capability(struct amdgpu_device *adev);
30 bool amdgpu_atomfirmware_gpu_virtualization_supported(struct amdgpu_device *adev);
31 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
32 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
33 int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
35 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
36 int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
37 bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
38 bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev);
39 bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device *adev, uint8_t* i2c_address);
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Diceland_ih.c51 static void iceland_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void iceland_ih_enable_interrupts(struct amdgpu_device *adev) in iceland_ih_enable_interrupts()
79 static void iceland_ih_disable_interrupts(struct amdgpu_device *adev) in iceland_ih_disable_interrupts()
106 static int iceland_ih_irq_init(struct amdgpu_device *adev) in iceland_ih_irq_init()
170 static void iceland_ih_irq_disable(struct amdgpu_device *adev) in iceland_ih_irq_disable()
190 static u32 iceland_ih_get_wptr(struct amdgpu_device *adev, in iceland_ih_get_wptr()
233 static void iceland_ih_decode_iv(struct amdgpu_device *adev, in iceland_ih_decode_iv()
265 static void iceland_ih_set_rptr(struct amdgpu_device *adev, in iceland_ih_set_rptr()
273 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_early_init()
288 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in iceland_ih_sw_init()
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Dcz_ih.c51 static void cz_ih_set_interrupt_funcs(struct amdgpu_device *adev);
60 static void cz_ih_enable_interrupts(struct amdgpu_device *adev) in cz_ih_enable_interrupts()
79 static void cz_ih_disable_interrupts(struct amdgpu_device *adev) in cz_ih_disable_interrupts()
106 static int cz_ih_irq_init(struct amdgpu_device *adev) in cz_ih_irq_init()
170 static void cz_ih_irq_disable(struct amdgpu_device *adev) in cz_ih_irq_disable()
190 static u32 cz_ih_get_wptr(struct amdgpu_device *adev, in cz_ih_get_wptr()
234 static void cz_ih_decode_iv(struct amdgpu_device *adev, in cz_ih_decode_iv()
266 static void cz_ih_set_rptr(struct amdgpu_device *adev, in cz_ih_set_rptr()
274 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_early_init()
289 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in cz_ih_sw_init()
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Dnv.h29 void nv_grbm_select(struct amdgpu_device *adev,
31 void nv_set_virt_ops(struct amdgpu_device *adev);
32 int nv_set_ip_blocks(struct amdgpu_device *adev);
33 int navi10_reg_base_init(struct amdgpu_device *adev);
34 int navi14_reg_base_init(struct amdgpu_device *adev);
35 int navi12_reg_base_init(struct amdgpu_device *adev);
36 int sienna_cichlid_reg_base_init(struct amdgpu_device *adev);
37 void vangogh_reg_base_init(struct amdgpu_device *adev);
38 int dimgrey_cavefish_reg_base_init(struct amdgpu_device *adev);
39 int beige_goby_reg_base_init(struct amdgpu_device *adev);
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Damdgpu_df.h34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
38 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
39 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
40 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
42 void (*get_clockgating_state)(struct amdgpu_device *adev,
44 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
46 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
48 int (*pmc_stop)(struct amdgpu_device *adev, uint64_t config,
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Duvd_v5_0.c41 static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev);
42 static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev);
43 static int uvd_v5_0_start(struct amdgpu_device *adev);
44 static void uvd_v5_0_stop(struct amdgpu_device *adev);
47 static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev,
58 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_rptr()
72 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_get_wptr()
86 struct amdgpu_device *adev = ring->adev; in uvd_v5_0_ring_set_wptr()
93 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_early_init()
105 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v5_0_sw_init()
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Damdgpu_xgmi.h38 struct amdgpu_device *hi_req_gpu;
54 struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev);
56 int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev);
57 int amdgpu_xgmi_add_device(struct amdgpu_device *adev);
58 int amdgpu_xgmi_remove_device(struct amdgpu_device *adev);
59 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);
60 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
61 struct amdgpu_device *peer_adev);
62 int amdgpu_xgmi_get_num_links(struct amdgpu_device *adev,
63 struct amdgpu_device *peer_adev);
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Duvd_v4_2.c42 static void uvd_v4_2_mc_resume(struct amdgpu_device *adev);
43 static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev);
44 static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev);
45 static int uvd_v4_2_start(struct amdgpu_device *adev);
46 static void uvd_v4_2_stop(struct amdgpu_device *adev);
49 static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,
60 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_rptr()
74 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_wptr()
88 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_set_wptr()
95 struct amdgpu_device *adev = (struct amdgpu_device *)handle; in uvd_v4_2_early_init()
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/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.h42 int amdgpu_dm_irq_init(struct amdgpu_device *adev);
50 void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
66 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
79 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
83 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
85 void amdgpu_dm_outbox_init(struct amdgpu_device *adev);
86 void amdgpu_dm_hpd_init(struct amdgpu_device *adev);
87 void amdgpu_dm_hpd_fini(struct amdgpu_device *adev);
93 int amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
100 int amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
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