Searched refs:apb_base (Results 1 – 6 of 6) sorted by relevance
| /drivers/pci/controller/dwc/ |
| D | pcie-keembay.c | 60 void __iomem *apb_base; member
96 val = readl(pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL); in keembay_pcie_ltssm_set()
101 writel(val, pcie->apb_base + PCIE_REGS_PCIE_APP_CNTRL); in keembay_pcie_ltssm_set()
109 val = readl(pcie->apb_base + PCIE_REGS_PCIE_SII_PM_STATE); in keembay_pcie_link_up()
125 ret = readl_poll_timeout(pcie->apb_base + PCIE_REGS_PCIE_PHY_STAT, in keembay_pcie_start_link()
211 writel(val, pcie->apb_base + PCIE_REGS_LJPLL_CNTRL_2); in keembay_pcie_pll_init()
215 writel(val, pcie->apb_base + PCIE_REGS_LJPLL_CNTRL_3); in keembay_pcie_pll_init()
218 writel(val, pcie->apb_base + PCIE_REGS_LJPLL_CNTRL_0); in keembay_pcie_pll_init()
220 ret = readl_poll_timeout(pcie->apb_base + PCIE_REGS_LJPLL_STA, in keembay_pcie_pll_init()
248 val = readl(pcie->apb_base + PCIE_REGS_INTERRUPT_STATUS); in keembay_pcie_msi_irq_handler()
[all …]
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| D | pcie-dw-rockchip.c | 47 void __iomem *apb_base; member
59 return readl_relaxed(rockchip->apb_base + reg); in rockchip_pcie_readl_apb()
65 writel_relaxed(val, rockchip->apb_base + reg); in rockchip_pcie_writel_apb()
146 rockchip->apb_base = devm_platform_ioremap_resource_byname(pdev, "apb"); in rockchip_pcie_resource_get()
147 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_resource_get()
148 return PTR_ERR(rockchip->apb_base); in rockchip_pcie_resource_get()
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| D | pcie-kirin.c | 83 void __iomem *apb_base; member
99 writel(val, kirin_pcie->apb_base + reg); in kirin_apb_ctrl_writel()
104 return readl(kirin_pcie->apb_base + reg); in kirin_apb_ctrl_readl()
150 kirin_pcie->apb_base = in kirin_pcie_get_resource()
152 if (IS_ERR(kirin_pcie->apb_base)) in kirin_pcie_get_resource()
153 return PTR_ERR(kirin_pcie->apb_base); in kirin_pcie_get_resource()
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| /drivers/pci/controller/ |
| D | pcie-rockchip.h | 293 void __iomem *apb_base; /* DT apb-base */ member
326 return readl(rockchip->apb_base + reg); in rockchip_pcie_read()
332 writel(val, rockchip->apb_base + reg); in rockchip_pcie_write()
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| D | pcie-rockchip.c | 49 rockchip->apb_base = in rockchip_pcie_parse_dt()
51 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_parse_dt()
52 return PTR_ERR(rockchip->apb_base); in rockchip_pcie_parse_dt()
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| D | pcie-rockchip-host.c | 108 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
135 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf()
333 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, in rockchip_pcie_host_init_port()
350 err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_host_init_port()
858 err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_DEBUG_OUT_0, in rockchip_pcie_wait_l2()
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