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Searched refs:asic_reset (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_asic.c204 .asic_reset = &r100_asic_reset,
272 .asic_reset = &r100_asic_reset,
368 .asic_reset = &r300_asic_reset,
436 .asic_reset = &r300_asic_reset,
504 .asic_reset = &r300_asic_reset,
572 .asic_reset = &r300_asic_reset,
640 .asic_reset = &rs600_asic_reset,
708 .asic_reset = &rs600_asic_reset,
776 .asic_reset = &rs600_asic_reset,
844 .asic_reset = &rs600_asic_reset,
[all …]
Dradeon_device.c1641 rdev->asic->asic_reset(rdev, true); in radeon_suspend_kms()
Dradeon.h1877 int (*asic_reset)(struct radeon_device *rdev, bool hard); member
2738 #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev), false)
/drivers/gpu/drm/amd/pm/powerplay/
Damd_powerplay.c1564 if (hwmgr->hwmgr_func->asic_reset == NULL) { in pp_asic_reset_mode_2()
1570 ret = hwmgr->hwmgr_func->asic_reset(hwmgr, SMU_ASIC_RESET_MODE_2); in pp_asic_reset_mode_2()
/drivers/gpu/drm/amd/pm/inc/
Dhwmgr.h362 int (*asic_reset)(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode); member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu10_hwmgr.c1661 .asic_reset = smu10_asic_reset,