| /drivers/gpu/drm/ |
| D | drm_property.c | 531 struct drm_property_blob *blob = in drm_property_free_blob() local
534 mutex_lock(&blob->dev->mode_config.blob_lock); in drm_property_free_blob()
535 list_del(&blob->head_global); in drm_property_free_blob()
536 mutex_unlock(&blob->dev->mode_config.blob_lock); in drm_property_free_blob()
538 drm_mode_object_unregister(blob->dev, &blob->base); in drm_property_free_blob()
540 kvfree(blob); in drm_property_free_blob()
561 struct drm_property_blob *blob; in drm_property_create_blob() local
567 blob = kvzalloc(sizeof(struct drm_property_blob)+length, GFP_KERNEL); in drm_property_create_blob()
568 if (!blob) in drm_property_create_blob()
573 INIT_LIST_HEAD(&blob->head_file); in drm_property_create_blob()
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| D | drm_writeback.c | 179 struct drm_property_blob *blob; in drm_writeback_connector_init() local
187 blob = drm_property_create_blob(dev, n_formats * sizeof(*formats), in drm_writeback_connector_init()
189 if (IS_ERR(blob)) in drm_writeback_connector_init()
190 return PTR_ERR(blob); in drm_writeback_connector_init()
228 blob->base.id); in drm_writeback_connector_init()
229 wb_connector->pixel_formats_blob_ptr = blob; in drm_writeback_connector_init()
238 drm_property_blob_put(blob); in drm_writeback_connector_init()
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| D | drm_color_mgmt.c | 279 struct drm_property_blob *blob; in drm_crtc_legacy_gamma_set() local
301 blob = drm_property_create_blob(dev, in drm_crtc_legacy_gamma_set()
304 if (IS_ERR(blob)) { in drm_crtc_legacy_gamma_set()
305 ret = PTR_ERR(blob); in drm_crtc_legacy_gamma_set()
306 blob = NULL; in drm_crtc_legacy_gamma_set()
311 blob_data = blob->data; in drm_crtc_legacy_gamma_set()
327 use_gamma_lut ? NULL : blob); in drm_crtc_legacy_gamma_set()
330 use_gamma_lut ? blob : NULL); in drm_crtc_legacy_gamma_set()
337 drm_property_blob_put(blob); in drm_crtc_legacy_gamma_set()
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| D | drm_atomic_uapi.c | 79 struct drm_property_blob *blob; in drm_atomic_set_mode_for_crtc() local
82 blob = drm_property_create_blob(crtc->dev, in drm_atomic_set_mode_for_crtc()
84 if (IS_ERR(blob)) in drm_atomic_set_mode_for_crtc()
85 return PTR_ERR(blob); in drm_atomic_set_mode_for_crtc()
89 state->mode_blob = blob; in drm_atomic_set_mode_for_crtc()
120 struct drm_property_blob *blob) in drm_atomic_set_mode_prop_for_crtc() argument
124 if (blob == state->mode_blob) in drm_atomic_set_mode_prop_for_crtc()
132 if (blob) { in drm_atomic_set_mode_prop_for_crtc()
135 if (blob->length != sizeof(struct drm_mode_modeinfo)) { in drm_atomic_set_mode_prop_for_crtc()
139 blob->length); in drm_atomic_set_mode_prop_for_crtc()
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| D | drm_plane.c | 153 formats_ptr(struct drm_format_modifier_blob *blob) in formats_ptr() argument
155 return (u32 *)(((char *)blob) + blob->formats_offset); in formats_ptr()
159 modifiers_ptr(struct drm_format_modifier_blob *blob) in modifiers_ptr() argument
161 return (struct drm_format_modifier *)(((char *)blob) + blob->modifiers_offset); in modifiers_ptr()
167 struct drm_property_blob *blob; in create_in_format_blob() local
190 blob = drm_property_create_blob(dev, blob_size, NULL); in create_in_format_blob()
191 if (IS_ERR(blob)) in create_in_format_blob()
194 blob_data = blob->data; in create_in_format_blob()
228 blob->base.id); in create_in_format_blob()
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| /drivers/staging/media/atomisp/pci/ |
| D | sh_css_firmware.c | 90 blob_data = fw_data + fw->blob.offset; in setup_binary()
94 sh_css_fw->blob.code = vmalloc(fw->blob.size); in setup_binary()
95 if (!sh_css_fw->blob.code) in setup_binary()
98 memcpy((void *)sh_css_fw->blob.code, blob_data, fw->blob.size); in setup_binary()
99 sh_css_fw->blob.data = (char *)sh_css_fw->blob.code + fw->blob.data_source; in setup_binary()
100 fw_minibuffer[binary_id].buffer = sh_css_fw->blob.code; in setup_binary()
111 const unsigned char *blob; in sh_css_load_blob_info() local
120 name = fw + bi->blob.prog_name_offset; in sh_css_load_blob_info()
121 blob = (const unsigned char *)fw + bi->blob.offset; in sh_css_load_blob_info()
124 if (bi->blob.size != in sh_css_load_blob_info()
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| D | ia_css_acc_types.h | 296 CSS_ALIGN(const struct ia_css_blob_descr *blob, 8);
382 struct ia_css_blob_info blob; /** Blob info */ member
396 const unsigned char *blob; member
462 (f)->header.sp.fw.blob.data_source)
468 #define IA_CSS_EXT_ISP_PROG_NAME(f) ((const char *)(f) + (f)->blob.prog_name_offset)
470 ((const struct ia_css_memory_offsets *)((const char *)(f) + (f)->blob.mem_offsets))
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| /drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_ads.c | 119 struct __guc_ads_blob *blob = guc->ads_blob; in intel_guc_ads_print_policy_info() local
121 if (unlikely(!blob)) in intel_guc_ads_print_policy_info()
125 drm_printf(dp, " DPC promote time = %u\n", blob->policies.dpc_promote_time); in intel_guc_ads_print_policy_info()
126 drm_printf(dp, " Max num work items = %u\n", blob->policies.max_num_work_items); in intel_guc_ads_print_policy_info()
127 drm_printf(dp, " Flags = %u\n", blob->policies.global_flags); in intel_guc_ads_print_policy_info()
142 struct __guc_ads_blob *blob = guc->ads_blob; in intel_guc_global_policies_update() local
147 if (!blob) in intel_guc_global_policies_update()
150 GEM_BUG_ON(!blob->ads.scheduler_policies); in intel_guc_global_policies_update()
152 guc_policies_init(guc, &blob->policies); in intel_guc_global_policies_update()
158 ret = guc_action_policies_update(guc, blob->ads.scheduler_policies); in intel_guc_global_policies_update()
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| D | intel_guc_ct.c | 236 void *blob; in intel_guc_ct_init() local
247 err = intel_guc_allocate_and_map_vma(guc, blob_size, &ct->vma, &blob); in intel_guc_ct_init()
257 desc = blob; in intel_guc_ct_init()
258 cmds = blob + 2 * CTB_DESC_SIZE; in intel_guc_ct_init()
262 ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size, in intel_guc_ct_init()
268 desc = blob + CTB_DESC_SIZE; in intel_guc_ct_init()
269 cmds = blob + 2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE; in intel_guc_ct_init()
273 ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size, in intel_guc_ct_init()
306 void *blob; in intel_guc_ct_enable() local
317 blob = __px_vaddr(ct->vma->obj); in intel_guc_ct_enable()
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| /drivers/of/ |
| D | fdt_address.c | 40 void (*count_cells)(const void *blob, int parentoffset,
48 static void __init fdt_bus_default_count_cells(const void *blob, int parentoffset, in fdt_bus_default_count_cells() argument
54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); in fdt_bus_default_count_cells()
62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); in fdt_bus_default_count_cells()
109 static int __init fdt_translate_one(const void *blob, int parent, in fdt_translate_one() argument
119 ranges = fdt_getprop(blob, parent, rprop, &rlen); in fdt_translate_one()
163 static u64 __init fdt_translate_address(const void *blob, int node_offset) in fdt_translate_address() argument
173 fdt_get_name(blob, node_offset, NULL)); in fdt_translate_address()
175 reg = fdt_getprop(blob, node_offset, "reg", &len); in fdt_translate_address()
178 fdt_get_name(blob, node_offset, NULL)); in fdt_translate_address()
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| D | fdt.c | 83 static bool of_fdt_device_is_available(const void *blob, unsigned long node) in of_fdt_device_is_available() argument
85 const char *status = fdt_getprop(blob, node, "status", NULL); in of_fdt_device_is_available()
108 static void populate_properties(const void *blob, in populate_properties() argument
120 for (cur = fdt_first_property_offset(blob, offset); in populate_properties()
122 cur = fdt_next_property_offset(blob, cur)) { in populate_properties()
127 val = fdt_getprop_by_offset(blob, cur, &pname, &sz); in populate_properties()
205 static int populate_node(const void *blob, in populate_node() argument
216 pathp = fdt_get_name(blob, offset, &len); in populate_node()
240 populate_properties(blob, offset, mem, np, pathp, dryrun); in populate_node()
284 static int unflatten_dt_nodes(const void *blob, in unflatten_dt_nodes() argument
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| /drivers/staging/media/ipu3/ |
| D | ipu3-css-fw.c | 19 bi->type, bi->blob.size, name); in imgu_css_fw_show_binary()
148 const char *name = (void *)css->fwp + bi->blob.prog_name_offset; in imgu_css_fw_init()
151 if (bi->blob.prog_name_offset >= css->fw->size) in imgu_css_fw_init()
153 len = strnlen(name, css->fw->size - bi->blob.prog_name_offset); in imgu_css_fw_init()
154 if (len + 1 > css->fw->size - bi->blob.prog_name_offset || in imgu_css_fw_init()
158 if (bi->blob.size != bi->blob.text_size + bi->blob.icache_size in imgu_css_fw_init()
159 + bi->blob.data_size + bi->blob.padding_size) in imgu_css_fw_init()
161 if (bi->blob.offset + bi->blob.size > css->fw->size) in imgu_css_fw_init()
216 if (bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_PARAM] in imgu_css_fw_init()
219 bi->blob.memory_offsets.offsets[IMGU_ABI_PARAM_CLASS_CONFIG] in imgu_css_fw_init()
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| /drivers/gpu/drm/i915/display/ |
| D | intel_color.c | 352 const struct drm_property_blob *blob) in chv_load_cgm_csc() argument
355 const struct drm_color_ctm *ctm = blob->data; in chv_load_cgm_csc()
540 const struct drm_property_blob *blob) in i9xx_load_lut_8() argument
547 if (!blob) in i9xx_load_lut_8()
550 lut = blob->data; in i9xx_load_lut_8()
569 const struct drm_property_blob *blob) in i965_load_lut_10p6() argument
572 const struct drm_color_lut *lut = blob->data; in i965_load_lut_10p6()
573 int i, lut_size = drm_color_lut_size(blob); in i965_load_lut_10p6()
606 const struct drm_property_blob *blob) in ilk_load_lut_8() argument
613 if (!blob) in ilk_load_lut_8()
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| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | gk20a.c | 41 struct nvkm_blob blob; in gk20a_gr_av_to_init() local
48 ret = nvkm_firmware_load_blob(subdev, path, name, ver, &blob); in gk20a_gr_av_to_init()
52 nent = (blob.size / sizeof(struct gk20a_fw_av)); in gk20a_gr_av_to_init()
64 struct gk20a_fw_av *av = &((struct gk20a_fw_av *)blob.data)[i]; in gk20a_gr_av_to_init()
75 nvkm_blob_dtor(&blob); in gk20a_gr_av_to_init()
91 struct nvkm_blob blob; in gk20a_gr_aiv_to_init() local
98 ret = nvkm_firmware_load_blob(subdev, path, name, ver, &blob); in gk20a_gr_aiv_to_init()
102 nent = (blob.size / sizeof(struct gk20a_fw_aiv)); in gk20a_gr_aiv_to_init()
114 struct gk20a_fw_aiv *av = &((struct gk20a_fw_aiv *)blob.data)[i]; in gk20a_gr_aiv_to_init()
125 nvkm_blob_dtor(&blob); in gk20a_gr_aiv_to_init()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | gp102.c | 39 struct nvkm_blob *blob = &fb->vpr_scrubber; in gp102_fb_vpr_scrub() local
49 hsbin_hdr = nvfw_bin_hdr(subdev, blob->data); in gp102_fb_vpr_scrub()
50 fw_hdr = nvfw_hs_header(subdev, blob->data + hsbin_hdr->header_offset); in gp102_fb_vpr_scrub()
51 lhdr = nvfw_hs_load_header(subdev, blob->data + fw_hdr->hdr_offset); in gp102_fb_vpr_scrub()
52 scrub_data = blob->data + hsbin_hdr->data_offset; in gp102_fb_vpr_scrub()
54 patch_loc = *(u32 *)(blob->data + fw_hdr->patch_loc); in gp102_fb_vpr_scrub()
55 patch_sig = *(u32 *)(blob->data + fw_hdr->patch_sig); in gp102_fb_vpr_scrub()
58 blob->data + fw_hdr->sig_dbg_offset + patch_sig, in gp102_fb_vpr_scrub()
62 blob->data + fw_hdr->sig_prod_offset + patch_sig, in gp102_fb_vpr_scrub()
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| /drivers/ata/ |
| D | pata_octeon_cf.c | 384 u16 blob; in octeon_cf_tf_read16() local
388 blob = __raw_readw(base + 0xc); in octeon_cf_tf_read16()
389 tf->error = blob >> 8; in octeon_cf_tf_read16()
391 blob = __raw_readw(base + 2); in octeon_cf_tf_read16()
392 tf->nsect = blob & 0xff; in octeon_cf_tf_read16()
393 tf->lbal = blob >> 8; in octeon_cf_tf_read16()
395 blob = __raw_readw(base + 4); in octeon_cf_tf_read16()
396 tf->lbam = blob & 0xff; in octeon_cf_tf_read16()
397 tf->lbah = blob >> 8; in octeon_cf_tf_read16()
399 blob = __raw_readw(base + 6); in octeon_cf_tf_read16()
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_firmware.c | 95 static bool _rtl92e_fw_prepare(struct net_device *dev, struct rt_fw_blob *blob, in _rtl92e_fw_prepare() argument
114 memset(blob->data, 0, padding); in _rtl92e_fw_prepare()
116 memset(blob->data + padding + fw->size, 0, 4); in _rtl92e_fw_prepare()
117 memcpy(blob->data + padding, fw->data, fw->size); in _rtl92e_fw_prepare()
119 blob->size = round_up(fw->size, 4) + padding; in _rtl92e_fw_prepare()
122 for (i = padding; i < blob->size; i += 4) { in _rtl92e_fw_prepare()
123 u32 *data = (u32 *)(blob->data + i); in _rtl92e_fw_prepare()
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| /drivers/gpu/drm/nouveau/include/nvkm/core/ |
| D | os.h | 31 nvkm_blob_dtor(struct nvkm_blob *blob) in nvkm_blob_dtor() argument
33 kfree(blob->data); in nvkm_blob_dtor()
34 blob->data = NULL; in nvkm_blob_dtor()
35 blob->size = 0; in nvkm_blob_dtor()
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| D | lut.c | 32 nv50_lut_load(struct nv50_lut *lut, int buffer, struct drm_property_blob *blob, in nv50_lut_load() argument
35 struct drm_color_lut *in = blob ? blob->data : NULL; in nv50_lut_load()
52 load(in, drm_color_lut_size(blob), mem); in nv50_lut_load()
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| /drivers/gpu/drm/nouveau/nvkm/core/ |
| D | firmware.c | 42 const char *name, int ver, struct nvkm_blob *blob) in nvkm_firmware_load_blob() argument
49 blob->data = kmemdup(fw->data, fw->size, GFP_KERNEL); in nvkm_firmware_load_blob()
50 blob->size = fw->size; in nvkm_firmware_load_blob()
52 if (!blob->data) in nvkm_firmware_load_blob()
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| /drivers/net/wireless/ralink/rt2x00/ |
| D | rt2x00debug.c | 581 struct debugfs_blob_wrapper *blob) in rt2x00debug_create_file_driver() argument
589 blob->data = data; in rt2x00debug_create_file_driver()
592 blob->size = strlen(blob->data); in rt2x00debug_create_file_driver()
594 debugfs_create_blob(name, 0400, intf->driver_folder, blob); in rt2x00debug_create_file_driver()
599 struct debugfs_blob_wrapper *blob) in rt2x00debug_create_file_chipset() argument
608 blob->data = data; in rt2x00debug_create_file_chipset()
630 blob->size = strlen(blob->data); in rt2x00debug_create_file_chipset()
632 debugfs_create_blob(name, 0400, intf->driver_folder, blob); in rt2x00debug_create_file_chipset()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_color.c | 87 __extract_blob_lut(const struct drm_property_blob *blob, uint32_t *size) in __extract_blob_lut() argument
89 *size = blob ? drm_color_lut_size(blob) : 0; in __extract_blob_lut()
90 return blob ? (struct drm_color_lut *)blob->data : NULL; in __extract_blob_lut()
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| /drivers/nfc/pn544/ |
| D | i2c.c | 740 struct pn544_i2c_fw_blob *blob; in pn544_hci_i2c_fw_work() local
756 blob = (struct pn544_i2c_fw_blob *) phy->fw->data; in pn544_hci_i2c_fw_work()
757 phy->fw_blob_size = get_unaligned_be32(&blob->be_size); in pn544_hci_i2c_fw_work()
759 &blob->be_destaddr); in pn544_hci_i2c_fw_work()
760 phy->fw_blob_data = blob->data; in pn544_hci_i2c_fw_work()
809 blob = (struct pn544_i2c_fw_blob *) (phy->fw_blob_data + in pn544_hci_i2c_fw_work()
811 phy->fw_blob_size = get_unaligned_be32(&blob->be_size); in pn544_hci_i2c_fw_work()
814 get_unaligned_be32(&blob->be_destaddr); in pn544_hci_i2c_fw_work()
815 phy->fw_blob_data = blob->data; in pn544_hci_i2c_fw_work()
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| /drivers/tee/amdtee/ |
| D | call.c | 403 phys_addr_t blob; in handle_load_ta() local
409 blob = __psp_pa(data); in handle_load_ta()
410 if (blob & (PAGE_SIZE - 1)) { in handle_load_ta()
411 pr_err("load TA: page unaligned. blob 0x%llx", blob); in handle_load_ta()
415 load_cmd.hi_addr = upper_32_bits(blob); in handle_load_ta()
416 load_cmd.low_addr = lower_32_bits(blob); in handle_load_ta()
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| /drivers/gpu/drm/mediatek/ |
| D | mtk_disp_ccorr.c | 112 struct drm_property_blob *blob = state->ctm; in mtk_ccorr_ctm_set() local
120 if (!blob) in mtk_ccorr_ctm_set()
123 ctm = (struct drm_color_ctm *)blob->data; in mtk_ccorr_ctm_set()
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