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Searched refs:calculated_states (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c3513 struct _vcs_dpi_voltage_scaling_st calculated_states[DC__VOLTAGE_STATES]; in dcn20_update_bounding_box() local
3521 memset(calculated_states, 0, sizeof(calculated_states)); in dcn20_update_bounding_box()
3536 calculated_states[i].state = i; in dcn20_update_bounding_box()
3537 calculated_states[i].dram_speed_mts = uclk_states[i] * 16 / 1000; in dcn20_update_bounding_box()
3543 calculated_states[i].fabricclk_mhz = (min_fclk_required_by_uclk < min_dcfclk) ? in dcn20_update_bounding_box()
3546calculated_states[i].socclk_mhz = (calculated_states[i].fabricclk_mhz > max_clocks->socClockInKhz … in dcn20_update_bounding_box()
3547 max_clocks->socClockInKhz / 1000 : calculated_states[i].fabricclk_mhz; in dcn20_update_bounding_box()
3549calculated_states[i].dcfclk_mhz = (calculated_states[i].fabricclk_mhz > max_clocks->dcfClockInKhz … in dcn20_update_bounding_box()
3550 max_clocks->dcfClockInKhz / 1000 : calculated_states[i].fabricclk_mhz; in dcn20_update_bounding_box()
3552 calculated_states[i].dispclk_mhz = max_clocks->displayClockInKhz / 1000; in dcn20_update_bounding_box()
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