Searched refs:ch_ctl (Results 1 – 2 of 2) sorted by relevance
/drivers/gpu/drm/i915/display/ |
D | intel_dp_aux.c | 39 i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); in intel_dp_aux_wait_done() local 44 #define C (((status = intel_uncore_read_notrace(&i915->uncore, ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) … in intel_dp_aux_wait_done() 49 trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true); in intel_dp_aux_wait_done() 218 i915_reg_t ch_ctl, ch_data[5]; in intel_dp_aux_xfer() local 228 ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); in intel_dp_aux_xfer() 259 status = intel_uncore_read_notrace(uncore, ch_ctl); in intel_dp_aux_xfer() 265 trace_i915_reg_rw(false, ch_ctl, status, sizeof(status), true); in intel_dp_aux_xfer() 268 const u32 status = intel_uncore_read(uncore, ch_ctl); in intel_dp_aux_xfer() 304 intel_uncore_write(uncore, ch_ctl, send_ctl); in intel_dp_aux_xfer() 310 ch_ctl, in intel_dp_aux_xfer()
|
/drivers/gpu/drm/gma500/ |
D | cdv_intel_dp.c | 577 uint32_t ch_ctl = output_reg + 0x10; in cdv_intel_dp_aux_ch() local 578 uint32_t ch_data = ch_ctl + 4; in cdv_intel_dp_aux_ch() 597 if (REG_READ(ch_ctl) & DP_AUX_CH_CTL_SEND_BUSY) { in cdv_intel_dp_aux_ch() 599 REG_READ(ch_ctl)); in cdv_intel_dp_aux_ch() 611 REG_WRITE(ch_ctl, in cdv_intel_dp_aux_ch() 621 status = REG_READ(ch_ctl); in cdv_intel_dp_aux_ch() 628 REG_WRITE(ch_ctl, in cdv_intel_dp_aux_ch()
|