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Searched refs:clk_mul (Results 1 – 5 of 5) sorted by relevance

/drivers/mmc/host/
Dsdhci-of-at91.c173 unsigned int clk_base, clk_mul; in sdhci_at91_set_clks_presets() local
188 clk_mul = gck_rate / clk_base_rate - 1; in sdhci_at91_set_clks_presets()
193 caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); in sdhci_at91_set_clks_presets()
202 clk_mul, gck_rate, clk_base_rate); in sdhci_at91_set_clks_presets()
Dsdhci.c1870 int real_div = div, clk_mul = 1; in sdhci_calc_clk() local
1881 if (host->clk_mul && in sdhci_calc_clk()
1885 clk_mul = host->clk_mul; in sdhci_calc_clk()
1896 if (host->clk_mul) { in sdhci_calc_clk()
1898 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1902 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1909 clk_mul = host->clk_mul; in sdhci_calc_clk()
1920 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
1949 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
4400 host->clk_mul = FIELD_GET(SDHCI_CLOCK_MUL_MASK, host->caps1); in sdhci_setup_host()
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Dsdhci.h526 unsigned int clk_mul; /* Clock Muliplier value */ member
/drivers/clk/
Dclk-versaclock5.c193 struct clk_hw clk_mul; member
287 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_recalc_rate()
310 container_of(hw, struct vc5_driver_data, clk_mul); in vc5_dbl_set_rate()
1023 vc5->clk_mul.init = &init; in vc5_probe()
1024 ret = devm_clk_hw_register(&client->dev, &vc5->clk_mul); in vc5_probe()
1041 parent_names[0] = clk_hw_get_name(&vc5->clk_mul); in vc5_probe()
/drivers/iio/adc/
Drcar-gyroadc.c78 const unsigned long clk_mul = in rcar_gyroadc_hw_init() local
80 unsigned long clk_len = clk_mhz * clk_mul; in rcar_gyroadc_hw_init()