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/drivers/hwtracing/coresight/
Dcoresight-etm4x-sysfs.c17 struct etmv4_config *config = &drvdata->config; in etm4_set_mode_exclude() local
19 idx = config->addr_idx; in etm4_set_mode_exclude()
25 if (BMVAL(config->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) { in etm4_set_mode_exclude()
34 if (config->addr_type[idx] != ETM_ADDR_TYPE_RANGE || in etm4_set_mode_exclude()
35 config->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE) in etm4_set_mode_exclude()
43 config->viiectlr |= BIT(idx / 2 + 16); in etm4_set_mode_exclude()
44 config->viiectlr &= ~BIT(idx / 2); in etm4_set_mode_exclude()
50 config->viiectlr |= BIT(idx / 2); in etm4_set_mode_exclude()
51 config->viiectlr &= ~BIT(idx / 2 + 16); in etm4_set_mode_exclude()
172 struct etmv4_config *config = &drvdata->config; in reset_store() local
[all …]
Dcoresight-etm3x-sysfs.c72 struct etm_config *config = &drvdata->config; in reset_store() local
80 memset(config, 0, sizeof(struct etm_config)); in reset_store()
81 config->mode = ETM_MODE_EXCLUDE; in reset_store()
82 config->trigger_event = ETM_DEFAULT_EVENT_VAL; in reset_store()
84 config->addr_type[i] = ETM_ADDR_TYPE_NONE; in reset_store()
87 etm_set_default(config); in reset_store()
100 struct etm_config *config = &drvdata->config; in mode_show() local
102 val = config->mode; in mode_show()
113 struct etm_config *config = &drvdata->config; in mode_store() local
120 config->mode = val & ETM_MODE_ALL; in mode_store()
[all …]
Dcoresight-cti-core.c63 struct cti_config *config = &drvdata->config; in cti_write_all_hw_regs() local
72 for (i = 0; i < config->nr_trig_max; i++) { in cti_write_all_hw_regs()
73 writel_relaxed(config->ctiinen[i], drvdata->base + CTIINEN(i)); in cti_write_all_hw_regs()
74 writel_relaxed(config->ctiouten[i], in cti_write_all_hw_regs()
79 writel_relaxed(config->ctigate, drvdata->base + CTIGATE); in cti_write_all_hw_regs()
80 writel_relaxed(config->asicctl, drvdata->base + ASICCTL); in cti_write_all_hw_regs()
81 writel_relaxed(config->ctiappset, drvdata->base + CTIAPPSET); in cti_write_all_hw_regs()
92 struct cti_config *config = &drvdata->config; in cti_enable_hw() local
99 if (config->hw_enabled || !config->hw_powered) in cti_enable_hw()
109 config->hw_enabled = true; in cti_enable_hw()
[all …]
Dcoresight-etm3x-core.c191 void etm_set_default(struct etm_config *config) in etm_set_default() argument
195 if (WARN_ON_ONCE(!config)) in etm_set_default()
207 config->enable_ctrl1 = BIT(24); in etm_set_default()
208 config->enable_ctrl2 = 0x0; in etm_set_default()
209 config->enable_event = ETM_HARD_WIRE_RES_A; in etm_set_default()
211 config->trigger_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
212 config->enable_event = ETM_HARD_WIRE_RES_A; in etm_set_default()
214 config->seq_12_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
215 config->seq_21_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
216 config->seq_23_event = ETM_DEFAULT_EVENT_VAL; in etm_set_default()
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/drivers/staging/media/atomisp/pci/css_2401_system/hive/
Dia_css_isp_params.c1807 struct ia_css_dp_config *config) in ia_css_get_dp_config() argument
1809 if (!config) in ia_css_get_dp_config()
1815 config); in ia_css_get_dp_config()
1817 *config = params->dp_config; in ia_css_get_dp_config()
1821 ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); in ia_css_get_dp_config()
1828 const struct ia_css_dp_config *config) in ia_css_set_dp_config() argument
1830 if (!config) in ia_css_set_dp_config()
1835 ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); in ia_css_set_dp_config()
1836 params->dp_config = *config; in ia_css_set_dp_config()
1846 struct ia_css_wb_config *config) in ia_css_get_wb_config() argument
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Dia_css_isp_configs.c38 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_iterator()
39 size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; in ia_css_configure_iterator()
40 offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; in ia_css_configure_iterator()
66 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_copy_output()
67 size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; in ia_css_configure_copy_output()
68 offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; in ia_css_configure_copy_output()
94 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_crop()
95 size = binary->info->mem_offsets.offsets.config->dmem.crop.size; in ia_css_configure_crop()
96 offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; in ia_css_configure_crop()
122 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_fpn()
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/drivers/rtc/
Drtc-spear.c85 static inline void spear_rtc_clear_interrupt(struct spear_rtc_config *config) in spear_rtc_clear_interrupt() argument
90 spin_lock_irqsave(&config->lock, flags); in spear_rtc_clear_interrupt()
91 val = readl(config->ioaddr + STATUS_REG); in spear_rtc_clear_interrupt()
93 writel(val, config->ioaddr + STATUS_REG); in spear_rtc_clear_interrupt()
94 spin_unlock_irqrestore(&config->lock, flags); in spear_rtc_clear_interrupt()
97 static inline void spear_rtc_enable_interrupt(struct spear_rtc_config *config) in spear_rtc_enable_interrupt() argument
101 val = readl(config->ioaddr + CTRL_REG); in spear_rtc_enable_interrupt()
103 spear_rtc_clear_interrupt(config); in spear_rtc_enable_interrupt()
105 writel(val, config->ioaddr + CTRL_REG); in spear_rtc_enable_interrupt()
109 static inline void spear_rtc_disable_interrupt(struct spear_rtc_config *config) in spear_rtc_disable_interrupt() argument
[all …]
Drtc-da9063.c69 const struct da9063_compatible_rtc_regmap *config; member
169 const struct da9063_compatible_rtc_regmap *config = rtc->config; in da9063_data_to_tm() local
171 tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask; in da9063_data_to_tm()
172 tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask; in da9063_data_to_tm()
173 tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask; in da9063_data_to_tm()
174 tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask; in da9063_data_to_tm()
176 config->rtc_count_month_mask); in da9063_data_to_tm()
178 config->rtc_count_year_mask); in da9063_data_to_tm()
184 const struct da9063_compatible_rtc_regmap *config = rtc->config; in da9063_tm_to_data() local
186 data[RTC_SEC] = tm->tm_sec & config->rtc_count_sec_mask; in da9063_tm_to_data()
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/drivers/staging/media/atomisp/pci/css_2400_system/hive/
Dia_css_isp_params.c1786 struct ia_css_dp_config *config) in ia_css_get_dp_config() argument
1788 if (!config) in ia_css_get_dp_config()
1794 config); in ia_css_get_dp_config()
1796 *config = params->dp_config; in ia_css_get_dp_config()
1800 ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); in ia_css_get_dp_config()
1807 const struct ia_css_dp_config *config) in ia_css_set_dp_config() argument
1809 if (!config) in ia_css_set_dp_config()
1814 ia_css_dp_debug_dtrace(config, IA_CSS_DEBUG_TRACE); in ia_css_set_dp_config()
1815 params->dp_config = *config; in ia_css_set_dp_config()
1827 struct ia_css_wb_config *config) in ia_css_get_wb_config() argument
[all …]
Dia_css_isp_configs.c38 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_iterator()
39 size = binary->info->mem_offsets.offsets.config->dmem.iterator.size; in ia_css_configure_iterator()
40 offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; in ia_css_configure_iterator()
66 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_copy_output()
67 size = binary->info->mem_offsets.offsets.config->dmem.copy_output.size; in ia_css_configure_copy_output()
68 offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; in ia_css_configure_copy_output()
94 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_crop()
95 size = binary->info->mem_offsets.offsets.config->dmem.crop.size; in ia_css_configure_crop()
96 offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; in ia_css_configure_crop()
122 if (binary->info->mem_offsets.offsets.config) { in ia_css_configure_fpn()
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/drivers/staging/sm750fb/
Dddk750_sii164.c132 unsigned char config; in sii164InitChip() local
151 config = SII164_CONFIGURATION_LATCH_FALLING; in sii164InitChip()
153 config = SII164_CONFIGURATION_LATCH_RISING; in sii164InitChip()
157 config |= SII164_CONFIGURATION_BUS_12BITS; in sii164InitChip()
159 config |= SII164_CONFIGURATION_BUS_24BITS; in sii164InitChip()
163 config |= SII164_CONFIGURATION_CLOCK_SINGLE; in sii164InitChip()
165 config |= SII164_CONFIGURATION_CLOCK_DUAL; in sii164InitChip()
169 config |= SII164_CONFIGURATION_HSYNC_FORCE_LOW; in sii164InitChip()
171 config |= SII164_CONFIGURATION_HSYNC_AS_IS; in sii164InitChip()
175 config |= SII164_CONFIGURATION_VSYNC_FORCE_LOW; in sii164InitChip()
[all …]
/drivers/staging/media/atomisp/pci/
Dia_css_isp_params.h162 const struct ia_css_dp_config *config);
168 const struct ia_css_wb_config *config);
174 const struct ia_css_tnr_config *config);
180 const struct ia_css_ob_config *config);
186 const struct ia_css_de_config *config);
192 const struct ia_css_anr_config *config);
198 const struct ia_css_anr_thres *config);
204 const struct ia_css_ce_config *config);
210 const struct ia_css_ecd_config *config);
216 const struct ia_css_ynr_config *config);
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/drivers/iio/adc/
Dmcp3422.c41 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5) argument
42 #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK) argument
43 #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2) argument
90 u8 config; member
101 adc->config = newconfig; in mcp3422_update_config()
108 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config) in mcp3422_read() argument
111 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config); in mcp3422_read()
118 *config = buf[3]; in mcp3422_read()
122 *config = buf[2]; in mcp3422_read()
134 u8 config; in mcp3422_read_channel() local
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/drivers/thunderbolt/
Dnvm.c59 struct nvmem_config config; in tb_nvm_add_active() local
62 memset(&config, 0, sizeof(config)); in tb_nvm_add_active()
64 config.name = "nvm_active"; in tb_nvm_add_active()
65 config.reg_read = reg_read; in tb_nvm_add_active()
66 config.read_only = true; in tb_nvm_add_active()
67 config.id = nvm->id; in tb_nvm_add_active()
68 config.stride = 4; in tb_nvm_add_active()
69 config.word_size = 4; in tb_nvm_add_active()
70 config.size = size; in tb_nvm_add_active()
71 config.dev = nvm->dev; in tb_nvm_add_active()
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/drivers/irqchip/
DKconfig4 config IRQCHIP
8 config ARM_GIC
13 config ARM_GIC_PM
18 config ARM_GIC_MAX_NR
24 config ARM_GIC_V2M
30 config GIC_NON_BANKED
33 config ARM_GIC_V3
39 config ARM_GIC_V3_ITS
44 config ARM_GIC_V3_ITS_PCI
51 config ARM_GIC_V3_ITS_FSL_MC
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/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_nve_vxlan.c95 struct mlxsw_sp_nve_config *config) in mlxsw_sp_nve_vxlan_config() argument
100 config->type = MLXSW_SP_NVE_TYPE_VXLAN; in mlxsw_sp_nve_vxlan_config()
101 config->ttl = cfg->ttl; in mlxsw_sp_nve_vxlan_config()
102 config->flowlabel = cfg->label; in mlxsw_sp_nve_vxlan_config()
103 config->learning_en = cfg->flags & VXLAN_F_LEARN ? 1 : 0; in mlxsw_sp_nve_vxlan_config()
104 config->ul_tb_id = RT_TABLE_MAIN; in mlxsw_sp_nve_vxlan_config()
105 config->ul_proto = MLXSW_SP_L3_PROTO_IPV4; in mlxsw_sp_nve_vxlan_config()
106 config->ul_sip.addr4 = cfg->saddr.sin.sin_addr.s_addr; in mlxsw_sp_nve_vxlan_config()
107 config->udp_dport = cfg->dst_port; in mlxsw_sp_nve_vxlan_config()
112 const struct mlxsw_sp_nve_config *config) in mlxsw_sp_nve_vxlan_config_prepare() argument
[all …]
/drivers/regulator/
Dgpio-regulator.c133 struct gpio_regulator_config *config; in of_get_gpio_regulator_config() local
139 config = devm_kzalloc(dev, in of_get_gpio_regulator_config()
142 if (!config) in of_get_gpio_regulator_config()
145 config->init_data = of_get_regulator_init_data(dev, np, desc); in of_get_gpio_regulator_config()
146 if (!config->init_data) in of_get_gpio_regulator_config()
149 config->supply_name = config->init_data->constraints.name; in of_get_gpio_regulator_config()
151 if (config->init_data->constraints.boot_on) in of_get_gpio_regulator_config()
152 config->enabled_at_boot = true; in of_get_gpio_regulator_config()
159 config->enabled_at_boot = true; in of_get_gpio_regulator_config()
161 of_property_read_u32(np, "startup-delay-us", &config->startup_delay); in of_get_gpio_regulator_config()
[all …]
/drivers/mmc/host/
Dmmci_qcom_dml.c50 u32 config; in qcom_dma_start() local
61 config = readl_relaxed(base + DML_CONFIG); in qcom_dma_start()
62 config = (config & ~PRODUCER_CRCI_MSK) | PRODUCER_CRCI_X_SEL; in qcom_dma_start()
63 config = (config & ~CONSUMER_CRCI_MSK) | CONSUMER_CRCI_DISABLE; in qcom_dma_start()
64 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_start()
73 config = readl_relaxed(base + DML_CONFIG); in qcom_dma_start()
74 config |= PRODUCER_TRANS_END_EN; in qcom_dma_start()
75 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_start()
81 config = readl_relaxed(base + DML_CONFIG); in qcom_dma_start()
82 config = (config & ~CONSUMER_CRCI_MSK) | CONSUMER_CRCI_X_SEL; in qcom_dma_start()
[all …]
/drivers/clk/renesas/
DKconfig3 config CLK_RENESAS
41 config CLK_EMEV2
44 config CLK_RZA1
48 config CLK_R7S9210
52 config CLK_R8A73A4
57 config CLK_R8A7740
62 config CLK_R8A7742
66 config CLK_R8A7743
70 config CLK_R8A7745
74 config CLK_R8A77470
[all …]
/drivers/block/
Dnbd.c107 static inline unsigned int nbd_blksize(struct nbd_config *config) in nbd_blksize() argument
109 return 1u << config->blksize_bits; in nbd_blksize()
118 struct nbd_config *config; member
278 static int nbd_disconnected(struct nbd_config *config) in nbd_disconnected() argument
280 return test_bit(NBD_RT_DISCONNECTED, &config->runtime_flags) || in nbd_disconnected()
281 test_bit(NBD_RT_DISCONNECT_REQUESTED, &config->runtime_flags); in nbd_disconnected()
287 if (!nsock->dead && notify && !nbd_disconnected(nbd->config)) { in nbd_mark_nsock_dead()
298 if (atomic_dec_return(&nbd->config->live_connections) == 0) { in nbd_mark_nsock_dead()
300 &nbd->config->runtime_flags)) { in nbd_mark_nsock_dead()
302 &nbd->config->runtime_flags); in nbd_mark_nsock_dead()
[all …]
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_pmu.c80 const char *config; member
115 { .name = "event", .config = "config:0-7" },
116 { .name = "instance", .config = "config:8-15" },
117 { .name = "umask", .config = "config:16-23"},
118 { .name = "type", .config = "config:56-63"}
124 .config = "event=0x7,instance=0x46,umask=0x2" },
126 .config = "event=0x7,instance=0x47,umask=0x2" }
145 { .name = "event", .config = "config:0-7" },
146 { .name = "instance", .config = "config:8-15" },
147 { .name = "umask", .config = "config:16-23"}
[all …]
/drivers/bluetooth/
Dbtqca.c186 struct qca_fw_config *config, in qca_tlv_check_data() argument
196 uint8_t nvm_baud_rate = config->user_baud_rate; in qca_tlv_check_data()
198 config->dnld_mode = QCA_SKIP_EVT_NONE; in qca_tlv_check_data()
199 config->dnld_type = QCA_SKIP_EVT_NONE; in qca_tlv_check_data()
201 switch (config->type) { in qca_tlv_check_data()
203 config->dnld_mode = QCA_SKIP_EVT_VSE_CC; in qca_tlv_check_data()
204 config->dnld_type = QCA_SKIP_EVT_VSE_CC; in qca_tlv_check_data()
221 config->dnld_mode = tlv_patch->download_mode; in qca_tlv_check_data()
222 config->dnld_type = config->dnld_mode; in qca_tlv_check_data()
297 BT_ERR("Unknown TLV type %d", config->type); in qca_tlv_check_data()
[all …]
/drivers/soc/renesas/
DKconfig9 config ARCH_RCAR_GEN1
17 config ARCH_RCAR_GEN2
26 config ARCH_RCAR_GEN3
35 config ARCH_RMOBILE
43 config ARCH_RZN1
51 config ARCH_EMEV2
56 config ARCH_R8A7794
62 config ARCH_R8A7779
71 config ARCH_R8A7790
79 config ARCH_R8A7778
[all …]
/drivers/staging/media/atomisp/pci/isp/kernels/ynr/ynr_2/
Dia_css_ynr2.host.c96 const struct ia_css_fc_config *config, in ia_css_fc_debug_dtrace() argument
101 config->gain_exp, in ia_css_fc_debug_dtrace()
102 config->coring_pos_0, config->coring_pos_1, in ia_css_fc_debug_dtrace()
103 config->coring_neg_0, config->coring_neg_1, in ia_css_fc_debug_dtrace()
104 config->gain_pos_0, config->gain_pos_1, in ia_css_fc_debug_dtrace()
105 config->gain_neg_0, config->gain_neg_1, in ia_css_fc_debug_dtrace()
106 config->crop_pos_0, config->crop_pos_1, in ia_css_fc_debug_dtrace()
107 config->crop_neg_0, config->crop_neg_1); in ia_css_fc_debug_dtrace()
112 const struct ia_css_ynr_config *config, in ia_css_ynr_debug_dtrace() argument
117 config->edge_sense_gain_0, config->edge_sense_gain_1, in ia_css_ynr_debug_dtrace()
[all …]
/drivers/clk/mvebu/
DKconfig2 config MVEBU_CLK_COMMON
5 config MVEBU_CLK_CPU
8 config MVEBU_CLK_COREDIV
11 config ARMADA_AP_CP_HELPER
14 config ARMADA_370_CLK
19 config ARMADA_375_CLK
23 config ARMADA_38X_CLK
27 config ARMADA_39X_CLK
31 config ARMADA_37XX_CLK
34 config ARMADA_XP_CLK
[all …]

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