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Searched refs:crtc_irq (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.c847 adev->crtc_irq.num_types = adev->mode_info.num_crtc; in amdgpu_dm_set_irq_funcs()
848 adev->crtc_irq.funcs = &dm_crtc_irq_funcs; in amdgpu_dm_set_irq_funcs()
Damdgpu_dm.c3414 r = amdgpu_irq_add_id(adev, client_id, i+1 , &adev->crtc_irq); in dce60_register_irq_handlers()
3499 r = amdgpu_irq_add_id(adev, client_id, i, &adev->crtc_irq); in dce110_register_irq_handlers()
3614 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->crtc_irq); in dcn10_register_irq_handlers()
/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c2421 amdgpu_irq_update(adev, &adev->crtc_irq, type); in dce_v8_0_crtc_dpms()
2676 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); in dce_v8_0_sw_init()
3519 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; in dce_v8_0_set_irq_funcs()
3521 adev->crtc_irq.num_types = 0; in dce_v8_0_set_irq_funcs()
3522 adev->crtc_irq.funcs = &dce_v8_0_crtc_irq_funcs; in dce_v8_0_set_irq_funcs()
Ddce_v6_0.c2411 amdgpu_irq_update(adev, &adev->crtc_irq, type); in dce_v6_0_crtc_dpms()
2653 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); in dce_v6_0_sw_init()
3440 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; in dce_v6_0_set_irq_funcs()
3442 adev->crtc_irq.num_types = 0; in dce_v6_0_set_irq_funcs()
3443 adev->crtc_irq.funcs = &dce_v6_0_crtc_irq_funcs; in dce_v6_0_set_irq_funcs()
Ddce_v10_0.c2516 amdgpu_irq_update(adev, &adev->crtc_irq, type); in dce_v10_0_crtc_dpms()
2775 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); in dce_v10_0_sw_init()
3627 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; in dce_v10_0_set_irq_funcs()
3629 adev->crtc_irq.num_types = 0; in dce_v10_0_set_irq_funcs()
3630 adev->crtc_irq.funcs = &dce_v10_0_crtc_irq_funcs; in dce_v10_0_set_irq_funcs()
Ddce_v11_0.c2592 amdgpu_irq_update(adev, &adev->crtc_irq, type); in dce_v11_0_crtc_dpms()
2893 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq); in dce_v11_0_sw_init()
3756 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; in dce_v11_0_set_irq_funcs()
3758 adev->crtc_irq.num_types = 0; in dce_v11_0_set_irq_funcs()
3759 adev->crtc_irq.funcs = &dce_v11_0_crtc_irq_funcs; in dce_v11_0_set_irq_funcs()
Damdgpu_kms.c1404 return amdgpu_irq_get(adev, &adev->crtc_irq, idx); in amdgpu_enable_vblank_kms()
1421 amdgpu_irq_put(adev, &adev->crtc_irq, idx); in amdgpu_disable_vblank_kms()
Damdgpu.h924 struct amdgpu_irq_src crtc_irq; member