Home
last modified time | relevance | path

Searched refs:cxl_p1_read (Results 1 – 3 of 3) sorted by relevance

/drivers/misc/cxl/
Dnative.c302 while (cxl_p1_read(adapter, CXL_XSL9_IERAT) & CXL_XSL9_IERAT_IINPROG) { in cxl_invalidate_all_psl9()
324 while (cxl_p1_read(adapter, CXL_PSL_TLBIA) & CXL_TLB_SLB_P) { in cxl_invalidate_all_psl8()
335 while (cxl_p1_read(adapter, CXL_PSL_SLBIA) & CXL_TLB_SLB_P) { in cxl_invalidate_all_psl8()
363 reg = cxl_p1_read(adapter, CXL_PSL_Control); in cxl_data_cache_flush()
367 reg = cxl_p1_read(adapter, CXL_PSL_Control); in cxl_data_cache_flush()
379 reg = cxl_p1_read(adapter, CXL_PSL_Control); in cxl_data_cache_flush()
423 slbia = cxl_p1_read(adapter, CXL_PSL_SLBIA); in slb_invalid()
1107 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR1); in cxl_native_irq_dump_regs_psl9()
1120 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR1); in cxl_native_irq_dump_regs_psl8()
1121 fir2 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR2); in cxl_native_irq_dump_regs_psl8()
[all …]
Dpci.c542 psl_debug = cxl_p1_read(adapter, CXL_PSL9_DEBUG); in init_implementation_adapter_regs_psl9()
598 return cxl_p1_read(adapter, CXL_PSL9_Timebase); in timebase_read_psl9()
603 return cxl_p1_read(adapter, CXL_PSL_Timebase); in timebase_read_psl8()
1547 trace_state = cxl_p1_read(adapter, CXL_PSL9_CTCCFG); in cxl_stop_trace_psl9()
Dcxl.h786 static inline u64 cxl_p1_read(struct cxl *cxl, cxl_p1_reg_t reg) in cxl_p1_read() function