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Searched refs:dcfclkv_min0p65 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c78 .dcfclkv_min0p65 = 300, /* MHz, = 3600/12, bypass */
615 v->dcfclk_per_state[0] = v->dcfclkv_min0p65;
798 v->dcfclkv_min0p65 = dc->dcn_soc->dcfclkv_min0p65; in dcn_validate_bandwidth()
886 v->dcfclk_per_state[0] = v->dcfclkv_min0p65; in dcn_validate_bandwidth()
1414 } else if (clocks_in_khz > dc->dcn_soc->dcfclkv_min0p65*1000) { in dcn_find_normalized_clock_vdd_Level()
1462 dcf_clk = dc->dcn_soc->dcfclkv_min0p65*1000; in dcn_find_dcfclk_suits_all()
1536 dc->dcn_soc->dcfclkv_min0p65 = dcfclks.data[0].clocks_in_khz / 1000.0; in dcn_bw_update_from_pplib()
1560 min_dcfclk_khz = dc->dcn_soc->dcfclkv_min0p65 * 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1657 dc->dcn_soc->dcfclkv_min0p65 * 1000, in dcn_bw_sync_calcs_and_dml()
/drivers/gpu/drm/amd/display/dc/inc/
Ddcn_calcs.h118 float dcfclkv_min0p65; member
555 float dcfclkv_min0p65; /*MHz*/ member