Home
last modified time | relevance | path

Searched refs:divisors (Results 1 – 20 of 20) sorted by relevance

/drivers/clk/at91/
Dclk-usb.c37 u32 divisors[4]; member
289 if (usb->divisors[usbdiv]) in at91rm9200_clk_usb_recalc_rate()
290 return parent_rate / usb->divisors[usbdiv]; in at91rm9200_clk_usb_recalc_rate()
309 if (!usb->divisors[i]) in at91rm9200_clk_usb_round_rate()
312 tmp_parent_rate = rate * usb->divisors[i]; in at91rm9200_clk_usb_round_rate()
314 tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]); in at91rm9200_clk_usb_round_rate()
346 if (usb->divisors[i] == div) { in at91rm9200_clk_usb_set_rate()
366 const char *parent_name, const u32 *divisors) in at91rm9200_clk_register_usb() argument
385 memcpy(usb->divisors, divisors, sizeof(usb->divisors)); in at91rm9200_clk_register_usb()
Dclk-master.c105 rate /= characteristics->divisors[div]; in clk_master_div_recalc_rate()
131 if (div > ARRAY_SIZE(characteristics->divisors)) in clk_master_div_set_rate()
134 for (i = 0; i < ARRAY_SIZE(characteristics->divisors); i++) { in clk_master_div_set_rate()
135 if (!characteristics->divisors[i]) in clk_master_div_set_rate()
138 if (div == characteristics->divisors[i]) { in clk_master_div_set_rate()
144 if (i == ARRAY_SIZE(characteristics->divisors)) in clk_master_div_set_rate()
176 for (i = 0; i < ARRAY_SIZE(characteristics->divisors); i++) { in clk_master_div_determine_rate()
177 if (!characteristics->divisors[i]) in clk_master_div_determine_rate()
181 characteristics->divisors[i]); in clk_master_div_determine_rate()
Dat91sam9260.c39 .divisors = { 1, 2, 4, 0 },
126 .divisors = { 1, 2, 4, 6 },
184 .divisors = { 1, 2, 4, 0 },
264 .divisors = { 1, 2, 4, 0 },
Ddt-compat.c354 characteristics->divisors, 4); in of_at91_clk_master_get_characteristics()
917 u32 divisors[4] = {0, 0, 0, 0}; in of_at91rm9200_clk_usb_setup() local
924 of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4); in of_at91rm9200_clk_usb_setup()
925 if (!divisors[0]) in of_at91rm9200_clk_usb_setup()
933 hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors); in of_at91rm9200_clk_usb_setup()
Dpmc.h51 u32 divisors[5]; member
241 const char *parent_name, const u32 *divisors);
Dat91sam9rl.c14 .divisors = { 1, 2, 4, 0 },
Dat91rm9200.c25 .divisors = { 1, 2, 3, 4 },
Dat91sam9g45.c14 .divisors = { 1, 2, 4, 3 },
Dat91sam9n12.c14 .divisors = { 1, 2, 4, 3 },
Dsama5d3.c14 .divisors = { 1, 2, 4, 3 },
Dsama5d4.c14 .divisors = { 1, 2, 4, 3 },
Dat91sam9x5.c14 .divisors = { 1, 2, 4, 3 },
Dsam9x60.c15 .divisors = { 1, 2, 4, 3 },
Dsama5d2.c14 .divisors = { 1, 2, 4, 3 },
Dsama7g5.c845 .divisors = { 1, 2, 4, 3, 5 },
/drivers/misc/
Dics932s401.c174 static const int divisors[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16, variable
190 freq /= divisors[data->regs[ICS932S401_REG_CPU_DIVISOR] >> in calculate_cpu_freq()
247 freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] & in calculate_src_freq()
295 freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] >> in calculate_pci_freq()
/drivers/video/fbdev/
Dcyber2000fb.c70 u_int divisors[4]; member
677 new_pll = pll_ps / cfb->divisors[div2]; in cyber2000fb_decode_clock()
1420 cfb->divisors[0] = 1; in cyberpro_alloc_fb_info()
1421 cfb->divisors[1] = 2; in cyberpro_alloc_fb_info()
1422 cfb->divisors[2] = 4; in cyberpro_alloc_fb_info()
1425 cfb->divisors[3] = 8; in cyberpro_alloc_fb_info()
1427 cfb->divisors[3] = 6; in cyberpro_alloc_fb_info()
/drivers/sh/clk/
Dcore.c55 if (src_table->divisors && i < src_table->nr_divisors) in clk_rate_table_build()
56 div = src_table->divisors[i]; in clk_rate_table_build()
Dcpg.c271 .divisors = sh_clk_div6_divisors,
/drivers/gpu/drm/vmwgfx/device_include/
Dsvga3d_cmd.h1072 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS]; member