Searched refs:divp (Results 1 – 5 of 5) sorted by relevance
| /drivers/clk/sunxi/ |
| D | clk-sun9i-cpus.c | 72 static long sun9i_a80_cpus_clk_round(unsigned long rate, u8 *divp, u8 *pre_divp, in sun9i_a80_cpus_clk_round() argument
105 if (divp) { in sun9i_a80_cpus_clk_round()
106 *divp = div - 1; in sun9i_a80_cpus_clk_round()
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| /drivers/media/dvb-frontends/ |
| D | si2165.c | 205 u8 divp = 1; /* only 1 or 4 */ in si2165_init_pll() local
221 divp = 4; in si2165_init_pll()
234 divp = 4; in si2165_init_pll()
237 divn = 1624000000u * divr / (ref_freq_hz * 2u * divp); in si2165_init_pll()
243 * 2u * divn * divp; in si2165_init_pll()
250 buf[2] = (divn & 0x3f) | ((divp == 1) ? 0x40 : 0x00) | 0x80; in si2165_init_pll()
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| /drivers/gpu/drm/tegra/ |
| D | dsi.c | 390 unsigned int *mulp, unsigned int *divp) in tegra_dsi_get_muldiv() argument
396 *divp = 1; in tegra_dsi_get_muldiv()
401 *divp = 1; in tegra_dsi_get_muldiv()
406 *divp = 4; in tegra_dsi_get_muldiv()
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| /drivers/clk/tegra/ |
| D | clk-pll.c | 1021 u32 divn = 0, divm = 0, divp = 0; in clk_plle_recalc_rate() local
1024 divp = (val >> pll->params->div_nmp->divp_shift) & (divp_mask(pll)); in clk_plle_recalc_rate()
1027 divm *= divp; in clk_plle_recalc_rate()
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| /drivers/scsi/sym53c8xx_2/ |
| D | sym_hipd.c | 469 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp) argument
516 *divp = div;
554 *divp = div;
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