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Searched refs:dmacr (Results 1 – 12 of 12) sorted by relevance

/drivers/tty/serial/
Damba-pl011.c263 unsigned int dmacr; /* dma control reg */ member
549 u16 dmacr; in pl011_dma_tx_callback() local
556 dmacr = uap->dmacr; in pl011_dma_tx_callback()
557 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
558 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
569 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
672 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
673 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
708 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
709 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
[all …]
/drivers/ata/
Dsata_dwc_460ex.c71 u32 dmacr; /* DMA Control */ member
735 u32 dmacr = sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr); in sata_dwc_clear_dmacr() local
738 dmacr = SATA_DWC_DMACR_RX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
739 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
741 dmacr = SATA_DWC_DMACR_TX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
742 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
750 __func__, tag, hsdevp->dma_pending[tag], dmacr); in sata_dwc_clear_dmacr()
751 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_clear_dmacr()
777 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr)); in sata_dwc_dma_xfer_complete()
786 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr)); in sata_dwc_dma_xfer_complete()
[all …]
/drivers/video/fbdev/
Dimxfb.c167 u_int dmacr; member
648 if (fbi->dmacr) in imxfb_activate_var()
649 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); in imxfb_activate_var()
695 fbi->dmacr = pdata->dmacr; in imxfb_init_fbinfo()
710 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); in imxfb_init_fbinfo()
/drivers/dma/xilinx/
Dxilinx_dma.c2502 u32 dmacr; in xilinx_vdma_channel_set_config() local
2507 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2516 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2518 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2519 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; in xilinx_vdma_channel_set_config()
2520 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; in xilinx_vdma_channel_set_config()
2535 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; in xilinx_vdma_channel_set_config()
2536 dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; in xilinx_vdma_channel_set_config()
2541 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; in xilinx_vdma_channel_set_config()
2542 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; in xilinx_vdma_channel_set_config()
[all …]
/drivers/crypto/ux500/cryp/
Dcryp_irqp.h89 u32 dmacr; /* Dma control register */ member
Dcryp.h185 u32 dmacr; member
Dcryp.c199 CRYP_SET_BITS(&device_data->base->dmacr, in cryp_configure_for_dma()
Dcryp_core.c374 writel_relaxed(CRYP_DMACR_DEFAULT, &device_data->base->dmacr); in cryp_setup_context()
/drivers/spi/
Dspi-pl022.c422 u16 dmacr; member
561 writew(chip->dmacr, SSP_DMACR(pl022->virtbase)); in restore_state()
1964 chip->dmacr = 0; in pl022_setup()
1970 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1972 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1977 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
1979 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
Dspi-rockchip.c529 u32 dmacr = 0; in rockchip_spi_config() local
574 dmacr |= TF_DMA_EN; in rockchip_spi_config()
576 dmacr |= RF_DMA_EN; in rockchip_spi_config()
594 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
/drivers/dma/
Dmpc512x_dma.c95 u32 dmacr; /* DMA control register */ member
1023 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA); in mpc_dma_probe()
1034 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | in mpc_dma_probe()
/drivers/net/ethernet/intel/i40e/
Di40e_adminq_cmd.h425 __le32 dmacr; member