| /drivers/phy/cadence/ |
| D | cdns-dphy.c | 76 int (*probe)(struct cdns_dphy *dphy);
77 void (*remove)(struct cdns_dphy *dphy);
78 void (*set_psm_div)(struct cdns_dphy *dphy, u8 div);
79 void (*set_clk_lane_cfg)(struct cdns_dphy *dphy,
81 void (*set_pll_cfg)(struct cdns_dphy *dphy,
83 unsigned long (*get_wakeup_time_ns)(struct cdns_dphy *dphy);
95 static int cdns_dsi_get_dphy_pll_cfg(struct cdns_dphy *dphy, in cdns_dsi_get_dphy_pll_cfg() argument
100 unsigned long pll_ref_hz = clk_get_rate(dphy->pll_ref_clk); in cdns_dsi_get_dphy_pll_cfg()
136 static int cdns_dphy_setup_psm(struct cdns_dphy *dphy) in cdns_dphy_setup_psm() argument
138 unsigned long psm_clk_hz = clk_get_rate(dphy->psm_clk); in cdns_dphy_setup_psm()
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| D | Makefile | 3 obj-$(CONFIG_PHY_CADENCE_DPHY) += cdns-dphy.o
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| D | Kconfig | 23 cdns-dphy.
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| /drivers/phy/allwinner/ |
| D | phy-sun6i-mipi-dphy.c | 99 struct sun6i_dphy *dphy = phy_get_drvdata(phy); in sun6i_dphy_init() local
101 reset_control_deassert(dphy->reset); in sun6i_dphy_init()
102 clk_prepare_enable(dphy->mod_clk); in sun6i_dphy_init()
103 clk_set_rate_exclusive(dphy->mod_clk, 150000000); in sun6i_dphy_init()
110 struct sun6i_dphy *dphy = phy_get_drvdata(phy); in sun6i_dphy_configure() local
117 memcpy(&dphy->config, opts, sizeof(dphy->config)); in sun6i_dphy_configure()
124 struct sun6i_dphy *dphy = phy_get_drvdata(phy); in sun6i_dphy_power_on() local
125 u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0); in sun6i_dphy_power_on()
127 regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG, in sun6i_dphy_power_on()
130 regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME0_REG, in sun6i_dphy_power_on()
[all …]
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| D | Makefile | 3 obj-$(CONFIG_PHY_SUN6I_MIPI_DPHY) += phy-sun6i-mipi-dphy.o
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| /drivers/gpu/drm/kmb/ |
| D | kmb_regs.h | 647 #define SET_DPHY_INIT_CTRL0(dev, dphy, offset) \ argument
649 ((dphy) + (offset)))
650 #define CLR_DPHY_INIT_CTRL0(dev, dphy, offset) \ argument
652 ((dphy) + (offset)))
659 #define SET_DPHY_FREQ_CTRL0_3(dev, dphy, val) \ argument
661 + (((dphy) / 4) * 4), (dphy % 4) * 8, 6, val)
667 #define GET_STOPSTATE_DATA(dev, dphy) \ argument
669 ((dphy) / 4) * 4)) >> \
670 (((dphy % 4) * 8) + 4)) & 0x03)
675 #define SET_DPHY_TEST_CTRL0(dev, dphy) \ argument
[all …]
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| /drivers/media/platform/marvell-ccic/ |
| D | mmp-driver.c | 99 pdata->dphy[0] = in mmpcam_calc_dphy()
107 pdata->dphy[0] = in mmpcam_calc_dphy()
139 pdata->dphy[2] = in mmpcam_calc_dphy()
144 pdata->dphy[0], pdata->dphy[1], pdata->dphy[2]); in mmpcam_calc_dphy()
201 mcam->dphy = pdata->dphy; in mmpcam_probe()
215 if ((IS_ERR(cam->mipi_clk) && mcam->dphy[2] == 0)) in mmpcam_probe()
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| D | mcam-core.c | 284 mcam->dphy[0], mcam->dphy[1], mcam->dphy[2]); in mcam_enable_mipi()
285 mcam_reg_write(mcam, REG_CSI2_DPHY3, mcam->dphy[0]); in mcam_enable_mipi()
286 mcam_reg_write(mcam, REG_CSI2_DPHY5, mcam->dphy[1]); in mcam_enable_mipi()
287 mcam_reg_write(mcam, REG_CSI2_DPHY6, mcam->dphy[2]); in mcam_enable_mipi()
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| D | mcam-core.h | 123 int *dphy; member
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| /drivers/staging/media/omap4iss/ |
| D | iss_csiphy.c | 94 reg = phy->dphy.ths_term << REGISTER0_THS_TERM_SHIFT; in csiphy_dphy_config()
95 reg |= phy->dphy.ths_settle << REGISTER0_THS_SETTLE_SHIFT; in csiphy_dphy_config()
100 reg = phy->dphy.tclk_term << REGISTER1_TCLK_TERM_SHIFT; in csiphy_dphy_config()
101 reg |= phy->dphy.tclk_miss << REGISTER1_CTRLCLK_DIV_FACTOR_SHIFT; in csiphy_dphy_config()
102 reg |= phy->dphy.tclk_settle << REGISTER1_TCLK_SETTLE_SHIFT; in csiphy_dphy_config()
211 csi2->phy->dphy = csi2phy; in omap4iss_csiphy_config()
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| D | iss_csiphy.h | 38 struct iss_csiphy_dphy_cfg dphy; member
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| /drivers/media/platform/rockchip/rkisp1/ |
| D | rkisp1-dev.c | 196 s_asd->dphy = devm_phy_get(rkisp1->dev, "dphy"); in rkisp1_subdev_notifier_bound()
197 if (IS_ERR(s_asd->dphy)) { in rkisp1_subdev_notifier_bound()
198 if (PTR_ERR(s_asd->dphy) != -EPROBE_DEFER) in rkisp1_subdev_notifier_bound()
200 return PTR_ERR(s_asd->dphy); in rkisp1_subdev_notifier_bound()
203 phy_init(s_asd->dphy); in rkisp1_subdev_notifier_bound()
215 phy_exit(s_asd->dphy); in rkisp1_subdev_notifier_unbind()
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| D | rkisp1-isp.c | 964 phy_set_mode(sensor->dphy, PHY_MODE_MIPI_DPHY); in rkisp1_mipi_csi2_start()
965 phy_configure(sensor->dphy, &opts); in rkisp1_mipi_csi2_start()
966 phy_power_on(sensor->dphy); in rkisp1_mipi_csi2_start()
973 phy_power_off(sensor->dphy); in rkisp1_mipi_csi2_stop()
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| D | rkisp1-common.h | 110 struct phy *dphy; member
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| /drivers/gpu/drm/rockchip/ |
| D | rockchip_lvds.c | 59 struct phy *dphy; member
502 lvds->dphy = devm_phy_get(&pdev->dev, "dphy"); in px30_lvds_probe()
503 if (IS_ERR(lvds->dphy)) in px30_lvds_probe()
504 return PTR_ERR(lvds->dphy); in px30_lvds_probe()
506 ret = phy_init(lvds->dphy); in px30_lvds_probe()
510 ret = phy_set_mode(lvds->dphy, PHY_MODE_LVDS); in px30_lvds_probe()
514 return phy_power_on(lvds->dphy); in px30_lvds_probe()
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| D | dw-mipi-dsi-rockchip.c | 260 struct phy *dphy; member
1430 dsi->dphy = devm_phy_create(dev, NULL, &dw_mipi_dsi_dphy_ops); in dw_mipi_dsi_rockchip_probe()
1431 if (IS_ERR(dsi->dphy)) { in dw_mipi_dsi_rockchip_probe()
1433 return PTR_ERR(dsi->dphy); in dw_mipi_dsi_rockchip_probe()
1436 phy_set_drvdata(dsi->dphy, dsi); in dw_mipi_dsi_rockchip_probe()
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| /drivers/media/platform/cadence/ |
| D | cdns-csi2rx.c | 71 struct phy *dphy; member
304 csi2rx->dphy = devm_phy_optional_get(&pdev->dev, "dphy"); in csi2rx_get_resources()
305 if (IS_ERR(csi2rx->dphy)) { in csi2rx_get_resources()
307 return PTR_ERR(csi2rx->dphy); in csi2rx_get_resources()
314 if (csi2rx->dphy) { in csi2rx_get_resources()
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| /drivers/gpu/drm/sun4i/ |
| D | sun6i_mipi_dsi.c | 762 phy_init(dsi->dphy); in sun6i_dsi_encoder_enable()
768 phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY); in sun6i_dsi_encoder_enable()
769 phy_configure(dsi->dphy, &opts); in sun6i_dsi_encoder_enable()
770 phy_power_on(dsi->dphy); in sun6i_dsi_encoder_enable()
808 phy_power_off(dsi->dphy); in sun6i_dsi_encoder_disable()
809 phy_exit(dsi->dphy); in sun6i_dsi_encoder_disable()
1174 dsi->dphy = devm_phy_get(dev, "dphy"); in sun6i_dsi_probe()
1175 if (IS_ERR(dsi->dphy)) { in sun6i_dsi_probe()
1177 ret = PTR_ERR(dsi->dphy); in sun6i_dsi_probe()
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| D | sun6i_mipi_dsi.h | 28 struct phy *dphy; member
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| /drivers/gpu/drm/bridge/ |
| D | cdns-dsi.c | 465 struct phy *dphy; member
625 ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); in cdns_dsi_check_conf()
727 phy_init(dsi->dphy); in cdns_dsi_hs_init()
728 phy_set_mode(dsi->dphy, PHY_MODE_MIPI_DPHY); in cdns_dsi_hs_init()
729 phy_configure(dsi->dphy, &output->phy_opts); in cdns_dsi_hs_init()
730 phy_power_on(dsi->dphy); in cdns_dsi_hs_init()
1208 dsi->dphy = devm_phy_get(&pdev->dev, "dphy"); in cdns_dsi_drm_probe()
1209 if (IS_ERR(dsi->dphy)) in cdns_dsi_drm_probe()
1210 return PTR_ERR(dsi->dphy); in cdns_dsi_drm_probe()
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| /drivers/phy/freescale/ |
| D | Makefile | 3 obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o
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| /drivers/phy/amlogic/ |
| D | Makefile | 8 obj-$(CONFIG_PHY_MESON_AXG_MIPI_DPHY) += phy-meson-axg-mipi-dphy.o
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| /drivers/phy/rockchip/ |
| D | Makefile | 3 obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0.o
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| D | Kconfig | 22 will be called phy-rockchip-dphy-rx0.
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| /drivers/phy/ |
| D | Makefile | 7 obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
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