Searched refs:dsi_pll (Results 1 – 3 of 3) sorted by relevance
105 config->dsi_pll.ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + calc_p - 2); in dsi_calc_mnp()106 config->dsi_pll.div = in dsi_calc_mnp()135 config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; in vlv_dsi_pll_compute()138 config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; in vlv_dsi_pll_compute()140 config->dsi_pll.ctrl |= DSI_PLL_VCO_EN; in vlv_dsi_pll_compute()143 config->dsi_pll.div, config->dsi_pll.ctrl); in vlv_dsi_pll_compute()158 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div); in vlv_dsi_pll_enable()160 config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN); in vlv_dsi_pll_enable()167 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl); in vlv_dsi_pll_enable()277 config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK; in vlv_dsi_get_pclk()[all …]
1054 } dsi_pll; member
8553 PIPE_CONF_CHECK_X(dsi_pll.ctrl); in intel_pipe_config_compare()8554 PIPE_CONF_CHECK_X(dsi_pll.div); in intel_pipe_config_compare()