Home
last modified time | relevance | path

Searched refs:dummy_pstate_latency_us (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h208 unsigned int dummy_pstate_latency_us; member
/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_structs.h113 double dummy_pstate_latency_us; member
Ddisplay_mode_vba.c243 mode_lib->vba.DummyPStateCheck = soc->dram_clock_change_latency_us == soc->dummy_pstate_latency_us; in fetch_socbb_params()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c333 .dummy_pstate_latency_us = 5.0,
444 .dummy_pstate_latency_us = 5.0,
3251 if (context->bw_ctx.dml.soc.dummy_pstate_latency_us == 0 || in dcn20_validate_bandwidth_fp()
3258 …ext->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us; in dcn20_validate_bandwidth_fp()
3599 if ((int)(bb->dummy_pstate_latency_us * 1000) in dcn20_patch_bounding_box()
3602 bb->dummy_pstate_latency_us = in dcn20_patch_bounding_box()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c139 …entries[WM_C].dml_input.pstate_latency_us = clk_mgr->base.ctx->dc->dml.soc.dummy_pstate_latency_us; in dcn3_build_wm_range_table()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c213 .dummy_pstate_latency_us = 5,
2205 …am_clock_change_latency_us = dc->clk_mgr->bw_params->dummy_pstate_table[i].dummy_pstate_latency_us; in dcn30_calculate_wm_and_dlg_fp()
/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c178 .dummy_pstate_latency_us = 5,
/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c196 .dummy_pstate_latency_us = 5,