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Searched refs:dvs (Results 1 – 19 of 19) sorted by relevance

/drivers/regulator/
Drohm-regulator.c59 int rohm_regulator_set_dvs_levels(const struct rohm_dvs_config *dvs, in rohm_regulator_set_dvs_levels() argument
72 if (dvs->level_map & bit) { in rohm_regulator_set_dvs_levels()
76 reg = dvs->run_reg; in rohm_regulator_set_dvs_levels()
77 mask = dvs->run_mask; in rohm_regulator_set_dvs_levels()
78 omask = dvs->run_on_mask; in rohm_regulator_set_dvs_levels()
82 reg = dvs->idle_reg; in rohm_regulator_set_dvs_levels()
83 mask = dvs->idle_mask; in rohm_regulator_set_dvs_levels()
84 omask = dvs->idle_on_mask; in rohm_regulator_set_dvs_levels()
88 reg = dvs->suspend_reg; in rohm_regulator_set_dvs_levels()
89 mask = dvs->suspend_mask; in rohm_regulator_set_dvs_levels()
[all …]
Dlp8788-buck.c91 void *dvs; member
102 struct lp8788_buck1_dvs *dvs = (struct lp8788_buck1_dvs *)buck->dvs; in lp8788_buck1_set_dvs() local
105 if (!dvs) in lp8788_buck1_set_dvs()
108 pinstate = dvs->vsel == DVS_SEL_V0 ? DVS_LOW : DVS_HIGH; in lp8788_buck1_set_dvs()
109 if (gpio_is_valid(dvs->gpio)) in lp8788_buck1_set_dvs()
110 gpio_set_value(dvs->gpio, pinstate); in lp8788_buck1_set_dvs()
115 struct lp8788_buck2_dvs *dvs = (struct lp8788_buck2_dvs *)buck->dvs; in lp8788_buck2_set_dvs() local
118 if (!dvs) in lp8788_buck2_set_dvs()
121 switch (dvs->vsel) { in lp8788_buck2_set_dvs()
142 if (gpio_is_valid(dvs->gpio[0])) in lp8788_buck2_set_dvs()
[all …]
Dbd71828-regulator.c27 const struct rohm_dvs_config dvs; member
103 return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); in buck_set_hw_dvs_levels()
198 .dvs = {
244 .dvs = {
281 .dvs = {
322 .dvs = {
363 .dvs = {
408 .dvs = {
449 .dvs = {
486 .dvs = {
[all …]
Dlp872x.c322 struct lp872x_dvs *dvs = lp->pdata ? lp->pdata->dvs : NULL; in lp872x_buck_set_voltage_sel() local
324 if (dvs && gpio_is_valid(dvs->gpio)) in lp872x_buck_set_voltage_sel()
325 lp872x_set_dvs(lp, dvs->vsel, dvs->gpio); in lp872x_buck_set_voltage_sel()
679 struct lp872x_dvs *dvs = lp->pdata ? lp->pdata->dvs : NULL; in lp872x_init_dvs() local
684 if (!dvs) in lp872x_init_dvs()
687 gpio = dvs->gpio; in lp872x_init_dvs()
691 pinstate = dvs->init_state; in lp872x_init_dvs()
843 pdata->dvs = devm_kzalloc(dev, sizeof(struct lp872x_dvs), GFP_KERNEL); in lp872x_populate_pdata_from_dt()
844 if (!pdata->dvs) in lp872x_populate_pdata_from_dt()
847 pdata->dvs->gpio = of_get_named_gpio(np, "ti,dvs-gpio", 0); in lp872x_populate_pdata_from_dt()
[all …]
Dpca9450-regulator.c30 const struct pc9450_dvs_config dvs; member
186 const struct pc9450_dvs_config *dvs = &data->dvs; in pca9450_set_dvs_levels() local
195 reg = dvs->run_reg; in pca9450_set_dvs_levels()
196 mask = dvs->run_mask; in pca9450_set_dvs_levels()
200 reg = dvs->standby_reg; in pca9450_set_dvs_levels()
201 mask = dvs->standby_mask; in pca9450_set_dvs_levels()
238 .dvs = {
267 .dvs = {
296 .dvs = {
476 .dvs = {
[all …]
Dbd71815-regulator.c28 const struct rohm_dvs_config *dvs; member
180 return rohm_regulator_set_dvs_levels(data->dvs, np, desc, cfg->regmap); in set_hw_dvs_levels()
234 ret = rohm_regulator_set_dvs_levels(data->dvs, np, desc, in buck12_set_hw_dvs_levels()
424 .dvs = (_dvs), \
446 .dvs = (_dvs), \
473 .dvs = (_dvs), \
515 .dvs = (_dvs), \
Dbd718x7-regulator.c452 const struct rohm_dvs_config dvs; member
724 return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); in buck_set_hw_dvs_levels()
775 .dvs = {
813 .dvs = {
1124 .dvs = {
1162 .dvs = {
1197 .dvs = {
1230 .dvs = {
/drivers/cpufreq/
Ds3c2412-cpufreq.c51 unsigned int hdiv, pdiv, armdiv, dvs; in s3c2412_cpufreq_calcdivs() local
88 cfg->divs.dvs = dvs = armclk < armdiv_clk; in s3c2412_cpufreq_calcdivs()
91 cfg->freq.armclk = dvs ? hclk : armdiv_clk; in s3c2412_cpufreq_calcdivs()
94 __func__, armclk, hclk, armdiv, hdiv, cfg->divs.dvs); in s3c2412_cpufreq_calcdivs()
148 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2412_cpufreq_setdivs()
Ds3c2440-cpufreq.c124 cfg->divs.dvs = 1; in s3c2440_cpufreq_calcdivs()
127 cfg->divs.dvs = 0; in s3c2440_cpufreq_calcdivs()
206 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2440_cpufreq_setdivs()
Ds3c24xx-cpufreq-debugfs.c86 cfg->divs.arm_divisor, cfg->divs.dvs ? "on" : "off"); in info_show()
DKconfig.arm248 Enable CPU voltage scaling when entering the dvs mode.
/drivers/staging/media/atomisp/pci/
Dia_css_isp_configs.h71 struct ia_css_isp_parameter dvs; member
Dia_css_acc_types.h214 struct ia_css_binary_dvs_info dvs; member
/drivers/staging/media/atomisp/pci/css_2400_system/hive/
Dia_css_isp_configs.c151 size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; in ia_css_configure_dvs()
152 offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; in ia_css_configure_dvs()
/drivers/staging/media/atomisp/pci/css_2401_system/hive/
Dia_css_isp_configs.c151 size = binary->info->mem_offsets.offsets.config->dmem.dvs.size; in ia_css_configure_dvs()
152 offset = binary->info->mem_offsets.offsets.config->dmem.dvs.offset; in ia_css_configure_dvs()
/drivers/staging/media/ipu3/
Dipu3-css-fw.h51 struct imgu_fw_isp_parameter dvs; member
Dipu3-abi.h1645 struct imgu_abi_binary_dvs_info dvs; member
Dipu3-css.c816 &cofs->dmem.dvs, sizeof(*cfg_dvs), in imgu_css_pipeline_init()
/drivers/staging/media/atomisp/
DMakefile78 pci/isp/kernels/dvs/dvs_1.0/ia_css_dvs.host.o \
225 -I$(atomisp)/pci/isp/kernels/dvs/ \
226 -I$(atomisp)/pci/isp/kernels/dvs/dvs_1.0/ \