Searched refs:gws_base (Results 1 – 11 of 11) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | mes_api_def.h | 201 uint32_t gws_base; member
373 uint32_t gws_base; member
401 uint32_t gws_base; member
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| D | amdgpu_job.h | 59 uint32_t gws_base, gws_size; member
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| D | amdgpu_ids.h | 56 uint32_t gws_base; member
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| D | amdgpu_vm.c | 1143 id->gws_base != job->gws_base || in amdgpu_vm_need_pipeline_sync()
1176 id->gws_base != job->gws_base || in amdgpu_vm_flush()
1252 id->gws_base = job->gws_base; in amdgpu_vm_flush()
1257 job->gds_size, job->gws_base, in amdgpu_vm_flush()
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| D | amdgpu_ring.h | 172 uint32_t gws_base, uint32_t gws_size,
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| D | amdgpu_ids.c | 535 id->gws_base = 0; in amdgpu_vmid_reset()
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| D | amdgpu_cs.c | 611 p->job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
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| D | gfx_v7_0.c | 4106 uint32_t gws_base, uint32_t gws_size, in gfx_v7_0_ring_emit_gds_switch() argument
4131 amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v7_0_ring_emit_gds_switch()
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| D | gfx_v8_0.c | 5199 uint32_t gws_base, uint32_t gws_size, in gfx_v8_0_ring_emit_gds_switch() argument
5224 amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v8_0_ring_emit_gds_switch()
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| D | gfx_v9_0.c | 4280 uint32_t gws_base, uint32_t gws_size, in gfx_v9_0_ring_emit_gds_switch() argument
4298 gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v9_0_ring_emit_gds_switch()
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| D | gfx_v10_0.c | 7770 uint32_t gws_base, uint32_t gws_size, in gfx_v10_0_ring_emit_gds_switch() argument
7788 gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base); in gfx_v10_0_ring_emit_gds_switch()
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