| /drivers/gpu/drm/i915/display/ |
| D | intel_tv.c | 315 u16 hblank_start, hblank_end, htotal; member
388 .hsync_end = 64, .hblank_end = 124,
430 .hsync_end = 64, .hblank_end = 124,
473 .hsync_end = 64, .hblank_end = 124,
516 .hsync_end = 64, .hblank_end = 124,
559 .hsync_end = 64, .hblank_end = 128,
604 .hsync_end = 64, .hblank_end = 142,
646 .hsync_end = 64, .hblank_end = 122,
670 .hsync_end = 64, .hblank_end = 139,
694 .hsync_end = 80, .hblank_end = 300,
[all …]
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| /drivers/video/fbdev/ |
| D | gbefb.c | 519 timing->hblank_end = timing->htotal; in compute_gbe_timing()
567 timing->hblank_end - 3); in gbe_set_timing_info()
577 SET_GBE_FIELD(VT_HCMAP, HCMAP_OFF, val, timing->hblank_end); in gbe_set_timing_info()
589 if (timing->hblank_end >= 20) in gbe_set_timing_info()
591 timing->hblank_end - 20); in gbe_set_timing_info()
594 timing->htotal - (20 - timing->hblank_end)); in gbe_set_timing_info()
599 if (timing->hblank_end >= GBE_CRS_MAGIC) in gbe_set_timing_info()
601 timing->hblank_end - GBE_CRS_MAGIC); in gbe_set_timing_info()
605 timing->hblank_end)); in gbe_set_timing_info()
610 SET_GBE_FIELD(VC_START_XY, VC_STARTX, val, timing->hblank_end - 4); in gbe_set_timing_info()
[all …]
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| /drivers/video/fbdev/intelfb/ |
| D | intelfbhw.c | 1047 u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive; in intelfbhw_mode_to_hw() local
1178 hblank_end = htotal; in intelfbhw_mode_to_hw()
1182 hblank_end); in intelfbhw_mode_to_hw()
1213 hblank_end--; in intelfbhw_mode_to_hw()
1214 if (check_overflow(hblank_end, HBLANKEND_MASK, "CRTC hblank_end")) in intelfbhw_mode_to_hw()
1238 (hblank_end << HSYNCEND_SHIFT); in intelfbhw_mode_to_hw()
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| /drivers/video/fbdev/vermilion/ |
| D | vermilion.c | 769 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end; in vmlfb_set_par_locked() local
785 hblank_end = htotal; in vmlfb_set_par_locked()
833 ((hblank_end - 1) << 16) | (hblank_start - 1)); in vmlfb_set_par_locked()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_rq_dlg_calc_31.c | 967 unsigned int hblank_end = dst->hblank_end; in dml_rq_dlg_get_dlg_params() local
1199 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1203 …disp_dlg_regs->refcyc_h_blank_end = (unsigned int) (((double) hblank_end + odm_pipe_index * (doubl… in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_rq_dlg_calc_30.c | 1008 unsigned int hblank_end = dst->hblank_end; in dml_rq_dlg_get_dlg_params() local
1306 disp_dlg_regs->refcyc_h_blank_end = (unsigned int)((double) hblank_end * ref_freq_to_pix_freq); in dml_rq_dlg_get_dlg_params()
1310 …disp_dlg_regs->refcyc_h_blank_end = (unsigned int)(((double) hblank_end + odm_pipe_index * (double… in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_structs.h | 343 unsigned int hblank_end; member
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| D | display_mode_lib.c | 201 dml_print("DML PARAMS: hblank_end = %d\n", pipe_dest->hblank_end); in dml_log_pipe_params()
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| D | dml1_display_rq_dlg_calc.c | 1011 unsigned int hblank_end = e2e_pipe_param.pipe.dest.hblank_end; in dml1_rq_dlg_get_dlg_params() local
1157 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml1_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_rq_dlg_calc_20.c | 808 unsigned int hblank_end = dst->hblank_end; in dml20_rq_dlg_get_dlg_params() local
934 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml20_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20v2.c | 808 unsigned int hblank_end = dst->hblank_end; in dml20v2_rq_dlg_get_dlg_params() local
934 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml20v2_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 854 unsigned int hblank_end = dst->hblank_end; in dml_rq_dlg_get_dlg_params() local
980 disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end in dml_rq_dlg_get_dlg_params()
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| /drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 433 input->dest.hblank_end = input->dest.hblank_start in pipe_ctx_to_e2e_pipe_params()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 2052 pipes[pipe_cnt].pipe.dest.hblank_end = pipes[pipe_cnt].pipe.dest.hblank_start in dcn20_populate_dml_pipes_from_context()
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