Searched refs:hor_total (Results 1 – 4 of 4) sorted by relevance
| /drivers/video/fbdev/via/ |
| D | via_modesetting.c | 22 raw.hor_total = timing->hor_total / 8 - 5; in via_set_primary_timing()
38 via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF); in via_set_primary_timing()
66 via_write_reg_mask(VIACR, 0x36, raw.hor_total >> (8 - 3) & 0x08, 0x08); in via_set_primary_timing()
80 raw.hor_total = timing->hor_total - 1; in via_set_secondary_timing()
93 via_write_reg(VIACR, 0x50, raw.hor_total & 0xFF); in via_set_secondary_timing()
100 via_write_reg_mask(VIACR, 0x55, (raw.hor_total >> 8 & 0x0F) in via_set_secondary_timing()
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| D | via_modesetting.h | 22 u16 hor_total; member
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| D | hw.c | 1464 timing.hor_total = timing.hor_sync_end + var->left_margin + dx; in var_to_timing()
1466 timing.hor_blank_end = timing.hor_total - dx; in var_to_timing()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_legacy_tv.c | 75 uint16_t hor_total; member
439 h_total = const_ptr->hor_total; in radeon_legacy_tv_init_restarts()
776 WREG32(RADEON_TV_HTOTAL, const_ptr->hor_total - 1); in radeon_legacy_tv_mode_set()
837 (((const_ptr->hor_total / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT); in radeon_legacy_tv_adjust_crtc_reg()
882 *htotal_cntl = (const_ptr->hor_total & 0x7) | RADEON_HTOT_CNTL_VGA_EN; in radeon_legacy_tv_adjust_pll1()
902 *htotal2_cntl = (const_ptr->hor_total & 0x7); in radeon_legacy_tv_adjust_pll2()
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