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Searched refs:intel_plane_ggtt_offset (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/display/
Di9xx_plane.c488 intel_plane_ggtt_offset(plane_state) + dspaddr_offset); in i9xx_update_plane()
491 intel_plane_ggtt_offset(plane_state) + dspaddr_offset); in i9xx_update_plane()
545 intel_plane_ggtt_offset(plane_state) + dspaddr_offset); in g4x_primary_async_flip()
562 intel_plane_ggtt_offset(plane_state) + dspaddr_offset); in vlv_primary_async_flip()
Dintel_sprite.c479 intel_plane_ggtt_offset(plane_state) + sprsurf_offset); in vlv_update_plane()
903 intel_plane_ggtt_offset(plane_state) + sprsurf_offset); in ivb_update_plane()
1224 intel_plane_ggtt_offset(plane_state) + dvssurf_offset); in g4x_update_plane()
Dintel_cursor.c47 base = intel_plane_ggtt_offset(plane_state); in intel_cursor_base()
Dskl_universal_plane.c1117 intel_plane_ggtt_offset(plane_state) + surf_addr); in skl_program_plane()
1144 intel_plane_ggtt_offset(plane_state) + surf_addr); in skl_plane_async_flip()
Dintel_display_types.h2032 static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *plane_state) in intel_plane_ggtt_offset() function
Dintel_display.c1729 if (intel_plane_ggtt_offset(plane_state) == plane_config->base) { in intel_reuse_initial_plane_obj()