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Searched refs:l (Results 1 – 25 of 533) sorted by relevance

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/drivers/video/fbdev/omap2/omapfb/dss/
Dpll.c244 u32 l; in dss_pll_write_config_type_a() local
246 l = 0; in dss_pll_write_config_type_a()
248 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
249 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
250 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
252 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
255 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
257 writel_relaxed(l, base + PLL_CONFIGURATION1); in dss_pll_write_config_type_a()
259 l = 0; in dss_pll_write_config_type_a()
261 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
[all …]
/drivers/gpu/drm/omapdrm/dss/
Dpll.c402 u32 l; in dss_pll_write_config_type_a() local
404 l = 0; in dss_pll_write_config_type_a()
406 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
407 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
408 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
410 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
413 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
415 writel_relaxed(l, base + PLL_CONFIGURATION1); in dss_pll_write_config_type_a()
417 l = 0; in dss_pll_write_config_type_a()
419 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
[all …]
/drivers/md/
Ddm-ima.c28 int l = strlen(*buf); in fix_separator_chars() local
31 for (i = 0; i < l; i++) in fix_separator_chars()
38 for (i = l-1, j = i+sp; i >= 0; i--) { in fix_separator_chars()
180 size_t device_data_buf_len, target_metadata_buf_len, target_data_buf_len, l = 0; in dm_ima_measure_on_table_load() local
229 memcpy(ima_buf + l, DM_IMA_VERSION_STR, table->md->ima.dm_version_str_len); in dm_ima_measure_on_table_load()
230 l += table->md->ima.dm_version_str_len; in dm_ima_measure_on_table_load()
233 memcpy(ima_buf + l, device_data_buf, device_data_buf_len); in dm_ima_measure_on_table_load()
234 l += device_data_buf_len; in dm_ima_measure_on_table_load()
266 cur_total_buf_len = l + target_metadata_buf_len + target_data_buf_len; in dm_ima_measure_on_table_load()
276 dm_ima_measure_data(table_load_event_name, ima_buf, l, noio); in dm_ima_measure_on_table_load()
[all …]
/drivers/macintosh/
Dwindfarm_smu_controls.c162 const char *l; in smu_fan_create() local
168 l = of_get_property(node, "location", NULL); in smu_fan_create()
169 if (l == NULL) in smu_fan_create()
187 if (!strcmp(l, "Rear Fan 0") || !strcmp(l, "Rear Fan") || in smu_fan_create()
188 !strcmp(l, "Rear fan 0") || !strcmp(l, "Rear fan") || in smu_fan_create()
189 !strcmp(l, "CPU A EXHAUST")) in smu_fan_create()
191 else if (!strcmp(l, "Rear Fan 1") || !strcmp(l, "Rear fan 1") || in smu_fan_create()
192 !strcmp(l, "CPU B EXHAUST")) in smu_fan_create()
194 else if (!strcmp(l, "Front Fan 0") || !strcmp(l, "Front Fan") || in smu_fan_create()
195 !strcmp(l, "Front fan 0") || !strcmp(l, "Front fan") || in smu_fan_create()
[all …]
/drivers/video/fbdev/omap/
Dsossi.c210 u32 l; in _set_timing() local
219 l = sossi_read_reg(SOSSI_INIT1_REG); in _set_timing()
220 l &= ~((0x0f << 20) | (0x3f << 24)); in _set_timing()
221 l |= (tw0 << 20) | (tw1 << 24); in _set_timing()
222 sossi_write_reg(SOSSI_INIT1_REG, l); in _set_timing()
228 u32 l; in _set_bits_per_cycle() local
230 l = sossi_read_reg(SOSSI_INIT3_REG); in _set_bits_per_cycle()
231 l &= ~0x3ff; in _set_bits_per_cycle()
232 l |= ((bus_pick_count - 1) << 5) | ((bus_pick_width - 1) & 0x1f); in _set_bits_per_cycle()
233 sossi_write_reg(SOSSI_INIT3_REG, l); in _set_bits_per_cycle()
[all …]
Dlcdc.c81 u32 l; in set_load_mode() local
83 l = omap_readl(OMAP_LCDC_CONTROL); in set_load_mode()
84 l &= ~(3 << 20); in set_load_mode()
87 l |= 1 << 20; in set_load_mode()
90 l |= 2 << 20; in set_load_mode()
97 omap_writel(l, OMAP_LCDC_CONTROL); in set_load_mode()
102 u32 l; in enable_controller() local
104 l = omap_readl(OMAP_LCDC_CONTROL); in enable_controller()
105 l |= OMAP_LCDC_CTRL_LCD_EN; in enable_controller()
106 l &= ~OMAP_LCDC_IRQ_MASK; in enable_controller()
[all …]
/drivers/md/bcache/
Dbset.h190 bool (*sort_cmp)(struct btree_iter_set l,
203 struct bkey *l, struct bkey *r);
301 bool bch_bkey_try_merge(struct btree_keys *b, struct bkey *l, struct bkey *r);
413 static __always_inline int64_t bkey_cmp(const struct bkey *l, in bkey_cmp() argument
416 return unlikely(KEY_INODE(l) != KEY_INODE(r)) in bkey_cmp()
417 ? (int64_t) KEY_INODE(l) - (int64_t) KEY_INODE(r) in bkey_cmp()
418 : (int64_t) KEY_OFFSET(l) - (int64_t) KEY_OFFSET(r); in bkey_cmp()
475 static inline bool bch_bkey_equal_header(const struct bkey *l, in bch_bkey_equal_header() argument
478 return (KEY_DIRTY(l) == KEY_DIRTY(r) && in bch_bkey_equal_header()
479 KEY_PTRS(l) == KEY_PTRS(r) && in bch_bkey_equal_header()
[all …]
Dextents.c39 static bool bch_key_sort_cmp(struct btree_iter_set l, in bch_key_sort_cmp() argument
42 int64_t c = bkey_cmp(l.k, r.k); in bch_key_sort_cmp()
44 return c ? c > 0 : l.k < r.k; in bch_key_sort_cmp()
258 static bool bch_extent_sort_cmp(struct btree_iter_set l, in bch_extent_sort_cmp() argument
261 int64_t c = bkey_cmp(&START_KEY(l.k), &START_KEY(r.k)); in bch_extent_sort_cmp()
263 return c ? c > 0 : l.k < r.k; in bch_extent_sort_cmp()
575 static uint64_t merge_chksums(struct bkey *l, struct bkey *r) in merge_chksums() argument
577 return (l->ptr[KEY_PTRS(l)] + r->ptr[KEY_PTRS(r)]) & in merge_chksums()
582 struct bkey *l, in bch_extent_merge() argument
591 for (i = 0; i < KEY_PTRS(l); i++) in bch_extent_merge()
[all …]
Dbset.c131 int __bch_keylist_realloc(struct keylist *l, unsigned int u64s) in __bch_keylist_realloc() argument
133 size_t oldsize = bch_keylist_nkeys(l); in __bch_keylist_realloc()
135 uint64_t *old_keys = l->keys_p == l->inline_keys ? NULL : l->keys_p; in __bch_keylist_realloc()
150 memcpy(new_keys, l->inline_keys, sizeof(uint64_t) * oldsize); in __bch_keylist_realloc()
152 l->keys_p = new_keys; in __bch_keylist_realloc()
153 l->top_p = new_keys + oldsize; in __bch_keylist_realloc()
159 struct bkey *bch_keylist_pop(struct keylist *l) in bch_keylist_pop() argument
161 struct bkey *k = l->keys; in bch_keylist_pop()
163 if (k == l->top) in bch_keylist_pop()
166 while (bkey_next(k) != l->top) in bch_keylist_pop()
[all …]
/drivers/char/tpm/
Dtpm_tis_core.h69 #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) argument
70 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) argument
71 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) argument
72 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) argument
73 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) argument
74 #define TPM_STS(l) (0x0018 | ((l) << 12)) argument
75 #define TPM_STS3(l) (0x001b | ((l) << 12)) argument
76 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) argument
78 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) argument
79 #define TPM_RID(l) (0x0F04 | ((l) << 12)) argument
/drivers/scsi/arm/
Dqueue.c106 struct list_head *l; in __queue_add() local
114 l = queue->free.next; in __queue_add()
115 list_del(l); in __queue_add()
117 q = list_entry(l, QE_t, list); in __queue_add()
124 list_add(l, &queue->head); in __queue_add()
126 list_add_tail(l, &queue->head); in __queue_add()
161 struct list_head *l; in queue_remove_exclude() local
165 list_for_each(l, &queue->head) { in queue_remove_exclude()
166 QE_t *q = list_entry(l, QE_t, list); in queue_remove_exclude()
169 SCpnt = __queue_remove(queue, l); in queue_remove_exclude()
[all …]
/drivers/cpufreq/
Dp4-clockmod.c54 u32 l, h; in cpufreq_p4_setdc() local
59 rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h); in cpufreq_p4_setdc()
61 if (l & 0x01) in cpufreq_p4_setdc()
68 rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h); in cpufreq_p4_setdc()
71 wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l & ~(1<<4), h); in cpufreq_p4_setdc()
80 l = (l & ~14); in cpufreq_p4_setdc()
81 l = l | (1<<4) | ((newstate & 0x7)<<1); in cpufreq_p4_setdc()
82 wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, l, h); in cpufreq_p4_setdc()
208 u32 l, h; in cpufreq_p4_get() local
210 rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h); in cpufreq_p4_get()
[all …]
/drivers/gpu/drm/sun4i/
Dsun4i_backend.h29 #define SUN4I_BACKEND_MODCTL_LAY_EN(l) BIT(8 + l) argument
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l))) argument
47 #define SUN4I_BACKEND_LAYCOOR_REG(l) (0x820 + (0x4 * (l))) argument
51 #define SUN4I_BACKEND_LAYLINEWIDTH_REG(l) (0x840 + (0x4 * (l))) argument
53 #define SUN4I_BACKEND_LAYFB_L32ADD_REG(l) (0x850 + (0x4 * (l))) argument
56 #define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), (l) * 8) argument
57 #define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8)) argument
66 #define SUN4I_BACKEND_ATTCTL_REG0(l) (0x890 + (0x4 * (l))) argument
77 #define SUN4I_BACKEND_ATTCTL_REG1(l) (0x8a0 + (0x4 * (l))) argument
/drivers/net/ethernet/smsc/
Dsmc91x.h90 #define SMC_insb(a, r, p, l) readsb((a) + (r), p, l) argument
91 #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, l) argument
92 #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) argument
93 #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) argument
94 #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) argument
95 #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) argument
129 #define SMC_insl(a, r, p, l) insl((a) + (r) - 0xa0000000, p, l) argument
130 #define SMC_outsl(a, r, p, l) outsl((a) + (r) - 0xa0000000, p, l) argument
131 #define SMC_insw(a, r, p, l) insw((a) + (r) - 0xa0000000, p, l) argument
132 #define SMC_outsw(a, r, p, l) outsw((a) + (r) - 0xa0000000, p, l) argument
[all …]
/drivers/clocksource/
Dtimer-ti-dm.c146 u32 l, timeout = 100000; in omap_dm_timer_reset() local
154 l = __omap_dm_timer_read(timer, in omap_dm_timer_reset()
156 } while (!l && timeout--); in omap_dm_timer_reset()
164 l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0); in omap_dm_timer_reset()
165 l |= 0x2 << 0x3; in omap_dm_timer_reset()
166 __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0); in omap_dm_timer_reset()
460 u32 l; in omap_dm_timer_modify_idlect_mask() local
462 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); in omap_dm_timer_modify_idlect_mask()
463 if (l & OMAP_TIMER_CTRL_ST) { in omap_dm_timer_modify_idlect_mask()
507 u32 l; in omap_dm_timer_start() local
[all …]
/drivers/isdn/capi/
Dcapiutil.c196 #define structTLcpy(x, y, l) memcpy(x, y, l) argument
197 #define structTLcpyovl(x, y, l) memmove(x, y, l) argument
202 #define structTRcpy(x, y, l) memcpy(y, x, l) argument
203 #define structTRcpyovl(x, y, l) memmove(y, x, l) argument
483 cdb = bufprint(cdb, "%-*s = 0x%x\n", slen, NAME, *(u8 *) (cmsg->m + cmsg->l)); in protocol_message_2_pars()
484 cmsg->l++; in protocol_message_2_pars()
487 cdb = bufprint(cdb, "%-*s = 0x%x\n", slen, NAME, *(u16 *) (cmsg->m + cmsg->l)); in protocol_message_2_pars()
488 cmsg->l += 2; in protocol_message_2_pars()
491 cdb = bufprint(cdb, "%-*s = 0x%lx\n", slen, NAME, *(u32 *) (cmsg->m + cmsg->l)); in protocol_message_2_pars()
492 cmsg->l += 4; in protocol_message_2_pars()
[all …]
/drivers/media/platform/qcom/camss/
Dcamss-csiphy-3ph-1-0.c241 int i, l = 0; in csiphy_gen1_config_lanes() local
246 l = 7; in csiphy_gen1_config_lanes()
248 l = c->data[i].pos * 2; in csiphy_gen1_config_lanes()
252 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_gen1_config_lanes()
255 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG2(l)); in csiphy_gen1_config_lanes()
258 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG3(l)); in csiphy_gen1_config_lanes()
262 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG5(l)); in csiphy_gen1_config_lanes()
265 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG6(l)); in csiphy_gen1_config_lanes()
268 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG7(l)); in csiphy_gen1_config_lanes()
272 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG8(l)); in csiphy_gen1_config_lanes()
[all …]
Dcamss-csiphy-2ph-1-0.c89 u8 val, l = 0; in csiphy_lanes_enable() local
108 l = c->clk.pos; in csiphy_lanes_enable()
110 l = c->data[i].pos; in csiphy_lanes_enable()
113 CAMSS_CSI_PHY_LNn_CFG2(l)); in csiphy_lanes_enable()
115 CAMSS_CSI_PHY_LNn_CFG3(l)); in csiphy_lanes_enable()
117 CAMSS_CSI_PHY_INTERRUPT_MASKn(l)); in csiphy_lanes_enable()
119 CAMSS_CSI_PHY_INTERRUPT_CLEARn(l)); in csiphy_lanes_enable()
127 u8 l = 0; in csiphy_lanes_disable() local
132 l = c->clk.pos; in csiphy_lanes_disable()
134 l = c->data[i].pos; in csiphy_lanes_disable()
[all …]
/drivers/virtio/
Dvirtio_pci_modern.c71 __le32 l; in vp_get() local
85 l = cpu_to_le32(ioread32(device + offset)); in vp_get()
86 memcpy(buf, &l, sizeof l); in vp_get()
89 l = cpu_to_le32(ioread32(device + offset)); in vp_get()
90 memcpy(buf, &l, sizeof l); in vp_get()
91 l = cpu_to_le32(ioread32(device + offset + sizeof l)); in vp_get()
92 memcpy(buf + sizeof l, &l, sizeof l); in vp_get()
109 __le32 l; in vp_set() local
123 memcpy(&l, buf, sizeof l); in vp_set()
124 iowrite32(le32_to_cpu(l), device + offset); in vp_set()
[all …]
Dvirtio_mmio.c155 __le32 l; in vm_get() local
176 l = cpu_to_le32(readl(base + offset)); in vm_get()
177 memcpy(buf, &l, sizeof l); in vm_get()
180 l = cpu_to_le32(readl(base + offset)); in vm_get()
181 memcpy(buf, &l, sizeof l); in vm_get()
182 l = cpu_to_le32(ioread32(base + offset + sizeof l)); in vm_get()
183 memcpy(buf + sizeof l, &l, sizeof l); in vm_get()
197 __le32 l; in vm_set() local
219 memcpy(&l, buf, sizeof l); in vm_set()
220 writel(le32_to_cpu(l), base + offset); in vm_set()
[all …]
/drivers/spi/
Dspi-omap2-mcspi.c203 u32 l, rw; in omap2_mcspi_set_dma_req() local
205 l = mcspi_cached_chconf0(spi); in omap2_mcspi_set_dma_req()
213 l |= rw; in omap2_mcspi_set_dma_req()
215 l &= ~rw; in omap2_mcspi_set_dma_req()
217 mcspi_write_chconf0(spi, l); in omap2_mcspi_set_dma_req()
223 u32 l; in omap2_mcspi_set_enable() local
225 l = cs->chctrl0; in omap2_mcspi_set_enable()
227 l |= OMAP2_MCSPI_CHCTRL_EN; in omap2_mcspi_set_enable()
229 l &= ~OMAP2_MCSPI_CHCTRL_EN; in omap2_mcspi_set_enable()
230 cs->chctrl0 = l; in omap2_mcspi_set_enable()
[all …]
/drivers/thermal/intel/
Dx86_pkg_temp_thermal.c179 u32 l, h, mask, shift, intr; in sys_set_trip_temp() local
186 &l, &h); in sys_set_trip_temp()
199 l &= ~mask; in sys_set_trip_temp()
205 l &= ~intr; in sys_set_trip_temp()
207 l |= (zonedev->tj_max - temp)/1000 << shift; in sys_set_trip_temp()
208 l |= intr; in sys_set_trip_temp()
212 l, h); in sys_set_trip_temp()
239 u32 l, h; in enable_pkg_thres_interrupt() local
241 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); in enable_pkg_thres_interrupt()
243 thres_0 = (l & THERM_MASK_THRESHOLD0) >> THERM_SHIFT_THRESHOLD0; in enable_pkg_thres_interrupt()
[all …]
Dtherm_throt.c470 u32 l; in thermal_throttle_online() local
479 l = apic_read(APIC_LVTTHMR); in thermal_throttle_online()
480 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); in thermal_throttle_online()
489 u32 l; in thermal_throttle_offline() local
492 l = apic_read(APIC_LVTTHMR); in thermal_throttle_offline()
493 apic_write(APIC_LVTTHMR, l | APIC_LVT_MASKED); in thermal_throttle_offline()
644 u32 l, h; in intel_init_thermal() local
654 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
671 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { in intel_init_thermal()
680 rdmsr(MSR_THERM2_CTL, l, h); in intel_init_thermal()
[all …]
/drivers/comedi/drivers/
Djr3_pci.c94 struct comedi_lrange l; member
512 r[0].l.range[0].min = -get_s16(&fs->fx) * 1000; in jr3_pci_poll_subdevice()
513 r[0].l.range[0].max = get_s16(&fs->fx) * 1000; in jr3_pci_poll_subdevice()
514 r[1].l.range[0].min = -get_s16(&fs->fy) * 1000; in jr3_pci_poll_subdevice()
515 r[1].l.range[0].max = get_s16(&fs->fy) * 1000; in jr3_pci_poll_subdevice()
516 r[2].l.range[0].min = -get_s16(&fs->fz) * 1000; in jr3_pci_poll_subdevice()
517 r[2].l.range[0].max = get_s16(&fs->fz) * 1000; in jr3_pci_poll_subdevice()
518 r[3].l.range[0].min = -get_s16(&fs->mx) * 100; in jr3_pci_poll_subdevice()
519 r[3].l.range[0].max = get_s16(&fs->mx) * 100; in jr3_pci_poll_subdevice()
520 r[4].l.range[0].min = -get_s16(&fs->my) * 100; in jr3_pci_poll_subdevice()
[all …]
/drivers/i3c/master/mipi-i3c-hci/
Dhci.h18 #define W0_MASK(h, l) GENMASK((h) - 0, (l) - 0) argument
19 #define W1_MASK(h, l) GENMASK((h) - 32, (l) - 32) argument
20 #define W2_MASK(h, l) GENMASK((h) - 64, (l) - 64) argument
21 #define W3_MASK(h, l) GENMASK((h) - 96, (l) - 96) argument

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