Searched refs:level_change_req (Results 1 – 7 of 7) sorted by relevance
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
D | dce60_clk_mgr.c | 125 struct dm_pp_power_level_change_request level_change_req; in dce60_update_clocks() local 132 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce60_update_clocks() 134 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce60_update_clocks() 135 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce60_update_clocks() 136 if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req)) in dce60_update_clocks() 137 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce60_update_clocks()
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/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_clk_mgr.c | 675 struct dm_pp_power_level_change_request level_change_req; in dce_update_clocks() local 682 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr, context); in dce_update_clocks() 684 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks() 685 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce_update_clocks() 686 if (dm_pp_apply_power_level_change_request(clk_mgr->ctx, &level_change_req)) in dce_update_clocks() 687 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce_update_clocks() 702 struct dm_pp_power_level_change_request level_change_req; in dce11_update_clocks() local 709 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr, context); in dce11_update_clocks() 711 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks() 712 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce11_update_clocks() [all …]
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
D | dce112_clk_mgr.c | 200 struct dm_pp_power_level_change_request level_change_req; in dce112_update_clocks() local 207 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce112_update_clocks() 209 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce112_update_clocks() 210 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce112_update_clocks() 211 if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req)) in dce112_update_clocks() 212 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce112_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
D | dce110_clk_mgr.c | 254 struct dm_pp_power_level_change_request level_change_req; in dce11_update_clocks() local 261 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce11_update_clocks() 263 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks() 264 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce11_update_clocks() 265 if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req)) in dce11_update_clocks() 266 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce11_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
D | dce_clk_mgr.c | 400 struct dm_pp_power_level_change_request level_change_req; in dce_update_clocks() local 407 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce_update_clocks() 409 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks() 410 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce_update_clocks() 411 if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req)) in dce_update_clocks() 412 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce_update_clocks()
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/drivers/gpu/drm/amd/display/dc/ |
D | dm_services.h | 228 struct dm_pp_power_level_change_request *level_change_req);
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_pp_smu.c | 439 struct dm_pp_power_level_change_request *level_change_req) in dm_pp_apply_power_level_change_request() argument
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