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Searched refs:max_banks (Results 1 – 3 of 3) sorted by relevance

/drivers/mtd/nand/raw/
Dcadence-nand-controller.c444 u8 max_banks; member
901 cdns_ctrl->caps2.max_banks = 1 << FIELD_GET(CTRL_FEATURES_N_BANKS, reg); in cadence_nand_get_caps()
2733 if (cs >= cdns_ctrl->caps2.max_banks) { in cadence_nand_chip_init()
2736 cs, cdns_ctrl->caps2.max_banks); in cadence_nand_chip_init()
2800 int max_cs = cdns_ctrl->caps2.max_banks; in cadence_nand_chips_init()
/drivers/iommu/amd/
Damd_iommu_types.h630 u8 max_banks; member
Dinit.c1742 iommu->max_banks = (u8) ((val >> 12) & 0x3f); in init_iommu_perf_ctr()
3340 return iommu->max_banks; in amd_iommu_pc_get_max_banks()
3380 max_offset_lim = (u32)(((0x40 | iommu->max_banks) << 12) | in iommu_pc_get_set_reg()