Home
last modified time | relevance | path

Searched refs:max_dispclk (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_clk_mgr.c551 uint32_t max_dispclk = 0, max_dppclk = 0; in dcn31_clk_mgr_helper_populate_bw_params() local
577 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn31_clk_mgr_helper_populate_bw_params()
599 bw_params->clk_table.entries[i].dispclk_mhz = max_dispclk; in dcn31_clk_mgr_helper_populate_bw_params()
/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c687 v->max_dispclk[0] = v->max_dppclk_vmin0p65; in hack_disable_optional_pipe_split()
887 v->max_dispclk[5] = v->max_dispclk_vmax0p9; in dcn_validate_bandwidth()
888 v->max_dispclk[4] = v->max_dispclk_vmax0p9; in dcn_validate_bandwidth()
889 v->max_dispclk[3] = v->max_dispclk_vmax0p9; in dcn_validate_bandwidth()
890 v->max_dispclk[2] = v->max_dispclk_vnom0p8; in dcn_validate_bandwidth()
891 v->max_dispclk[1] = v->max_dispclk_vmid0p72; in dcn_validate_bandwidth()
892 v->max_dispclk[0] = v->max_dispclk_vmin0p65; in dcn_validate_bandwidth()
Ddcn_calc_auto.c451 …if (v->min_dispclk_using_single_dpp <=dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i]) &… in mode_support_and_system_configuration()
455 …else if (v->min_dispclk_using_dual_dpp <=dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i]… in mode_support_and_system_configuration()
480 … if (v->min_dispclk_using_single_dpp >dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { in mode_support_and_system_configuration()
487 … if (v->min_dispclk_using_dual_dpp >dcn_bw_min2(v->max_dispclk[i], (j + 1) * v->max_dppclk[i])) { in mode_support_and_system_configuration()
1214 if (v->dispclk_without_ramping > v->max_dispclk[number_of_states]) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1217 else if (v->dispclk_with_ramping > v->max_dispclk[number_of_states]) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
1218 v->dispclk = v->max_dispclk[number_of_states]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
/drivers/gpu/drm/amd/display/dc/inc/
Ddcn_calcs.h104 float max_dispclk[number_of_states_plus_one + 1]; member