| /drivers/staging/media/atomisp/pci/base/circbuf/src/ |
| D | circbuf.c | 126 int max_offset; in ia_css_circbuf_extract() local
133 max_offset = ia_css_circbuf_get_offset(cb, cb->desc->start, cb->desc->end); in ia_css_circbuf_extract()
134 max_offset--; in ia_css_circbuf_extract()
147 if (offset > max_offset) { in ia_css_circbuf_extract()
|
| /drivers/staging/qlge/ |
| D | qlge_dbg.c | 606 u32 max_offset; in qlge_get_mac_protocol_registers() local
613 max_offset = MAC_ADDR_MAX_CAM_WCOUNT; in qlge_get_mac_protocol_registers()
617 max_offset = MAC_ADDR_MAX_CAM_WCOUNT; in qlge_get_mac_protocol_registers()
622 max_offset = MAC_ADDR_MAX_CAM_WCOUNT; in qlge_get_mac_protocol_registers()
626 max_offset = MAC_ADDR_MAX_FC_MAC_WCOUNT; in qlge_get_mac_protocol_registers()
630 max_offset = MAC_ADDR_MAX_MGMT_MAC_WCOUNT; in qlge_get_mac_protocol_registers()
634 max_offset = MAC_ADDR_MAX_MGMT_VLAN_WCOUNT; in qlge_get_mac_protocol_registers()
638 max_offset = MAC_ADDR_MAX_MGMT_V4_WCOUNT; in qlge_get_mac_protocol_registers()
642 max_offset = MAC_ADDR_MAX_MGMT_V6_WCOUNT; in qlge_get_mac_protocol_registers()
646 max_offset = MAC_ADDR_MAX_MGMT_TU_DP_WCOUNT; in qlge_get_mac_protocol_registers()
[all …]
|
| /drivers/gpu/drm/radeon/ |
| D | radeon_object.c | 292 int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, in radeon_bo_pin_restricted() argument
306 if (max_offset != 0) { in radeon_bo_pin_restricted()
313 WARN_ON_ONCE(max_offset < in radeon_bo_pin_restricted()
329 (!max_offset || max_offset > bo->rdev->mc.visible_vram_size)) in radeon_bo_pin_restricted()
333 bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; in radeon_bo_pin_restricted()
|
| D | radeon_object.h | 148 u64 max_offset, u64 *gpu_addr);
|
| /drivers/net/wireless/mediatek/mt76/mt7603/ |
| D | init.c | 452 int max_offset, cur_offset; in mt7603_init_txpower() local
461 max_offset = 0; in mt7603_init_txpower()
464 max_offset = max(max_offset, cur_offset); in mt7603_init_txpower()
467 target_power += max_offset; in mt7603_init_txpower()
|
| /drivers/gpu/drm/i915/selftests/ |
| D | i915_vma.c | 596 unsigned int n, max_offset; in igt_vma_rotate_remap() local
598 max_offset = max(plane_info[0].src_stride * plane_info[0].height, in igt_vma_rotate_remap()
600 GEM_BUG_ON(max_offset > max_pages); in igt_vma_rotate_remap()
601 max_offset = max_pages - max_offset; in igt_vma_rotate_remap()
612 for_each_prime_number_from(plane_info[0].offset, 0, max_offset) { in igt_vma_rotate_remap()
613 for_each_prime_number_from(plane_info[1].offset, 0, max_offset) { in igt_vma_rotate_remap()
|
| /drivers/net/ethernet/broadcom/bnxt/ |
| D | bnxt_hwrm.c | 734 u32 max_offset, offset; in hwrm_req_dma_slice() local
739 max_offset = BNXT_HWRM_DMA_SIZE - ctx->allocated; in hwrm_req_dma_slice()
740 offset = max_offset - size; in hwrm_req_dma_slice()
744 if (addr < req_addr + max_offset && req_addr + ctx->req_len <= addr) { in hwrm_req_dma_slice()
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_object.c | 904 u64 min_offset, u64 max_offset) in amdgpu_bo_pin_restricted() argument
913 if (WARN_ON_ONCE(min_offset > max_offset)) in amdgpu_bo_pin_restricted()
942 if (max_offset != 0) { in amdgpu_bo_pin_restricted()
945 WARN_ON_ONCE(max_offset < in amdgpu_bo_pin_restricted()
968 lpfn = max_offset >> PAGE_SHIFT; in amdgpu_bo_pin_restricted()
|
| D | amdgpu_object.h | 305 u64 min_offset, u64 max_offset);
|
| D | gfx_v8_0.c | 3927 int max_offset) in gfx_v8_0_parse_ind_reg_list() argument
3938 BUG_ON(*offset_count >= max_offset); in gfx_v8_0_parse_ind_reg_list()
|
| /drivers/mtd/ |
| D | ftl.c | 154 loff_t offset, max_offset; in scan_header() local
158 max_offset = (0x100000<part->mbd.mtd->size)?0x100000:part->mbd.mtd->size; in scan_header()
161 (offset + sizeof(header)) < max_offset; in scan_header()
173 if (offset == max_offset) { in scan_header()
|
| /drivers/scsi/ |
| D | 53c700.c | 238 __u8 max_offset = (hostdata->chip710 in NCR_700_offset_period_to_sxfer() local
249 if(offset > max_offset) { in NCR_700_offset_period_to_sxfer()
251 offset, max_offset); in NCR_700_offset_period_to_sxfer()
252 offset = max_offset; in NCR_700_offset_period_to_sxfer()
2004 int max_offset = hostdata->chip710 in NCR_700_set_offset() local
2010 if(offset > max_offset) in NCR_700_set_offset()
2011 offset = max_offset; in NCR_700_set_offset()
|
| /drivers/net/ethernet/chelsio/libcxgb/ |
| D | libcxgb_ppm.h | 54 u32 max_offset; member
|
| D | libcxgb_ppm.c | 306 hdr->max_offset = htonl(length); in cxgbi_ppm_make_ppod_hdr()
|
| /drivers/media/dvb-frontends/ |
| D | m88ds3103.c | 384 u32 max_offset = 0; in m88ds3103b_select_mclk() local
404 if (offset_MHz[i] > max_offset) { in m88ds3103b_select_mclk()
405 max_offset = offset_MHz[i]; in m88ds3103b_select_mclk()
|
| /drivers/media/pci/ivtv/ |
| D | ivtvfb.c | 181 unsigned long max_offset; member
214 osd->max_offset = oi->display_width * oi->display_height * 4; in ivtvfb_get_osd_coords()
|
| /drivers/pci/ |
| D | pci.c | 3197 u32 dw0, bei, base, max_offset; in pci_ea_read() local
3240 pci_read_config_dword(dev, ent_offset, &max_offset); in pci_ea_read()
3260 end = start + (max_offset | 0x03); in pci_ea_read()
3263 if (max_offset & PCI_EA_IS_64) { in pci_ea_read()
|
| /drivers/net/wireless/quantenna/qtnfmac/ |
| D | commands.c | 272 s->he_obss_pd.max_offset; in qtnf_cmd_send_start_ap()
|
| /drivers/net/wireless/ath/ath11k/ |
| D | mac.c | 1976 he_obss_pd->max_offset); in ath11k_mac_config_obss_pd()
1994 srg_th = ATH11K_OBSS_PD_MAX_THRESHOLD + he_obss_pd->max_offset; in ath11k_mac_config_obss_pd()
|
| D | wmi.c | 2963 cmd->obss_max = he_obss_pd->max_offset; in ath11k_wmi_send_obss_spr_cmd()
|
| /drivers/net/usb/ |
| D | r8152.c | 2769 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX; in rtl8152_features_check() local
2772 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset) in rtl8152_features_check()
|