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Searched refs:mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h3584 #define mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX … macro
Ddcn_3_0_1_offset.h4399 #define mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX … macro
Ddcn_2_1_0_offset.h4215 #define mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX … macro
Ddcn_3_0_2_offset.h4940 #define mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX … macro
Ddcn_2_0_0_offset.h5153 #define mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX … macro
Ddcn_3_0_0_offset.h4986 #define mmCM1_CM_BLNDGAM_RAMA_REGION_28_29_BASE_IDX … macro