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Searched refs:mmCM1_CM_ICSC_C23_C24 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h4018 #define mmCM1_CM_ICSC_C23_C24 … macro
Ddcn_1_0_offset.h4112 #define mmCM1_CM_ICSC_C23_C24 … macro
Ddcn_2_0_0_offset.h4956 #define mmCM1_CM_ICSC_C23_C24 … macro