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Searched refs:mmCOMPUTE_PGM_LO (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h332 #define mmCOMPUTE_PGM_LO 0x2E0C macro
Dgfx_7_2_d.h1211 #define mmCOMPUTE_PGM_LO 0x2e0c macro
Dgfx_7_0_d.h1198 #define mmCOMPUTE_PGM_LO 0x2e0c macro
Dgfx_8_1_d.h1296 #define mmCOMPUTE_PGM_LO 0x2e0c macro
Dgfx_8_0_d.h1293 #define mmCOMPUTE_PGM_LO 0x2e0c macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c1591 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1617 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1643 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
Dgfx_v9_0.c4667 ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO) in gfx_v9_0_do_edc_gpr_workarounds()
4695 ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO) in gfx_v9_0_do_edc_gpr_workarounds()
4723 ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO) in gfx_v9_0_do_edc_gpr_workarounds()
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2202 #define mmCOMPUTE_PGM_LO … macro
Dgc_9_2_1_offset.h2421 #define mmCOMPUTE_PGM_LO … macro
Dgc_9_1_offset.h2487 #define mmCOMPUTE_PGM_LO … macro
Dgc_10_1_0_offset.h4559 #define mmCOMPUTE_PGM_LO … macro
Dgc_10_3_0_offset.h4212 #define mmCOMPUTE_PGM_LO … macro