Searched refs:mmIH_CLK_CTRL (Results 1 – 7 of 7) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | navi10_ih.c | 664 def = data = RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL); in navi10_ih_update_clockgating_state()
677 WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data); in navi10_ih_update_clockgating_state()
703 if (!RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL)) in navi10_ih_get_clockgating_state()
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| D | vega10_ih.c | 586 def = data = RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL); in vega10_ih_update_clockgating_state()
606 WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data); in vega10_ih_update_clockgating_state()
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| D | vega20_ih.c | 637 def = data = RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL); in vega20_ih_update_clockgating_state()
654 WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data); in vega20_ih_update_clockgating_state()
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| /drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | osssys_4_0_offset.h | 212 #define mmIH_CLK_CTRL … macro
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| D | osssys_4_0_1_offset.h | 212 #define mmIH_CLK_CTRL … macro
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| D | osssys_5_0_0_offset.h | 212 #define mmIH_CLK_CTRL … macro
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| D | osssys_4_2_0_offset.h | 214 #define mmIH_CLK_CTRL … macro
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