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Searched refs:mmINPUT_GAMMA_CONTROL (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Ddce_v10_0.c2134 tmp = RREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_crtc_load_lut()
2137 WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_crtc_load_lut()
Ddce_v11_0.c2171 tmp = RREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_crtc_load_lut()
2173 WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_crtc_load_lut()
Ddce_v8_0.c2034 WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_crtc_load_lut()
Ddce_v6_0.c2063 WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset, in dce_v6_0_crtc_load_lut()
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3875 #define mmINPUT_GAMMA_CONTROL 0x1A10 macro
Ddce_8_0_d.h1640 #define mmINPUT_GAMMA_CONTROL 0x1a10 macro
Ddce_10_0_d.h2489 #define mmINPUT_GAMMA_CONTROL 0x1a10 macro
Ddce_11_0_d.h2383 #define mmINPUT_GAMMA_CONTROL 0x1a10 macro
Ddce_11_2_d.h3614 #define mmINPUT_GAMMA_CONTROL 0x1a10 macro