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Searched refs:mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h6392 #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 … macro
Ddcn_3_0_1_offset.h10606 #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 … macro
Ddcn_2_1_0_offset.h6146 #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 … macro
Ddcn_3_0_2_offset.h12862 #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 … macro
Ddcn_2_0_0_offset.h7124 #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 … macro
Ddcn_3_0_0_offset.h14178 #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_REGION_10_11 … macro