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Searched refs:mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h4034 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro
Ddcn_3_0_1_offset.h6407 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro
Ddcn_2_1_0_offset.h7816 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro
Ddcn_1_0_offset.h6202 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro
Ddcn_3_0_2_offset.h7716 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro
Ddcn_2_0_0_offset.h8847 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro
Ddcn_3_0_0_offset.h8539 #define mmODM0_OPTC_INPUT_GLOBAL_CONTROL_BASE_IDX macro