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Searched refs:mmio_info (Results 1 – 3 of 3) sorted by relevance

/drivers/acpi/
Dprmt.c69 struct prm_mmio_info *mmio_info; member
124 mmio_range_size = struct_size(tm->mmio_info, addr_ranges, mmio_count); in acpi_parse_prmt()
125 tm->mmio_info = kmalloc(mmio_range_size, GFP_KERNEL); in acpi_parse_prmt()
127 memmove(tm->mmio_info, temp_mmio, mmio_range_size); in acpi_parse_prmt()
129 mmio_range_size = struct_size(tm->mmio_info, addr_ranges, mmio_count); in acpi_parse_prmt()
130 tm->mmio_info = kmalloc(mmio_range_size, GFP_KERNEL); in acpi_parse_prmt()
131 tm->mmio_info->mmio_count = 0; in acpi_parse_prmt()
244 context.mmio_ranges = module->mmio_info; in acpi_platformrt_space_handler()
/drivers/gpu/drm/i915/gvt/
Dcmd_parser.c902 struct intel_gvt_mmio_info *mmio_info; in cmd_reg_handler() local
905 mmio_info = intel_gvt_find_mmio_info(gvt, offset); in cmd_reg_handler()
906 if (mmio_info && mmio_info->write) in cmd_reg_handler()
969 struct intel_gvt_mmio_info *mmio_info; in cmd_reg_handler() local
973 mmio_info = intel_gvt_find_mmio_info(gvt, offset); in cmd_reg_handler()
974 if (!mmio_info) { in cmd_reg_handler()
977 u64 ro_mask = mmio_info->ro_mask; in cmd_reg_handler()
981 ret = mmio_info->write(s->vgpu, offset, in cmd_reg_handler()
Dhandlers.c3873 struct intel_gvt_mmio_info *mmio_info; in intel_vgpu_mmio_reg_rw() local
3895 mmio_info = intel_gvt_find_mmio_info(gvt, offset); in intel_vgpu_mmio_reg_rw()
3896 if (!mmio_info) { in intel_vgpu_mmio_reg_rw()
3902 return mmio_info->read(vgpu, offset, pdata, bytes); in intel_vgpu_mmio_reg_rw()
3904 u64 ro_mask = mmio_info->ro_mask; in intel_vgpu_mmio_reg_rw()
3908 if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) { in intel_vgpu_mmio_reg_rw()
3913 ret = mmio_info->write(vgpu, offset, pdata, bytes); in intel_vgpu_mmio_reg_rw()
3922 ret = mmio_info->write(vgpu, offset, &data, bytes); in intel_vgpu_mmio_reg_rw()
3926 if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) { in intel_vgpu_mmio_reg_rw()