Searched refs:mode_val (Results 1 – 11 of 11) sorted by relevance
/drivers/leds/ |
D | leds-netxbig.c | 49 int *mode_val; member 111 int *mode_val; member 145 int mode_val; in netxbig_led_blink_set() local 154 mode_val = led_dat->mode_val[mode]; in netxbig_led_blink_set() 155 if (mode_val == NETXBIG_LED_INVALID_MODE) in netxbig_led_blink_set() 160 gpio_ext_set_value(led_dat->gpio_ext, led_dat->mode_addr, mode_val); in netxbig_led_blink_set() 174 int mode_val; in netxbig_led_set() local 191 mode_val = led_dat->mode_val[mode]; in netxbig_led_set() 193 gpio_ext_set_value(led_dat->gpio_ext, led_dat->mode_addr, mode_val); in netxbig_led_set() 216 int mode_val; in sata_store() local [all …]
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D | leds-lm3530.c | 86 enum lm3530_mode mode_val; member 150 return mode_map[i].mode_val; in lm3530_get_mode_from_str() 358 if (drvdata->mode == mode_map[i].mode_val) in mode_show()
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/drivers/spi/ |
D | spi-npcm-pspi.c | 106 u16 mode_val; in npcm_pspi_set_mode() local 110 mode_val = 0; in npcm_pspi_set_mode() 113 mode_val = NPCM_PSPI_CTL1_SCIDL; in npcm_pspi_set_mode() 116 mode_val = NPCM_PSPI_CTL1_SCM; in npcm_pspi_set_mode() 119 mode_val = NPCM_PSPI_CTL1_SCIDL | NPCM_PSPI_CTL1_SCM; in npcm_pspi_set_mode() 125 iowrite16(regtemp | mode_val, priv->base + NPCM_PSPI_CTL1); in npcm_pspi_set_mode()
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/drivers/regulator/ |
D | rt6160-regulator.c | 95 unsigned int mode_val; in rt6160_set_mode() local 99 mode_val = RT6160_FPWM_MASK; in rt6160_set_mode() 102 mode_val = 0; in rt6160_set_mode() 109 return regmap_update_bits(regmap, RT6160_REG_CNTL, RT6160_FPWM_MASK, mode_val); in rt6160_set_mode()
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D | cpcap-regulator.c | 106 mode_mask, volt_mask, mode_val, off_val, \ argument 122 .enable_val = (mode_val), \
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/drivers/media/usb/gspca/ |
D | kinect.c | 280 uint8_t mode_val; in sd_start_video() local 288 mode_val = 0x03; in sd_start_video() 293 mode_val = 0x01; in sd_start_video() 338 write_register(gspca_dev, 0x05, mode_val); in sd_start_video()
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/drivers/pinctrl/bcm/ |
D | pinctrl-bcm6328.c | 40 unsigned mode_val:1; member 251 .mode_val = 1, \ 344 bcm6328_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6328_pinctrl_set_mux()
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D | pinctrl-bcm6358.c | 42 const uint16_t mode_val; member 137 .mode_val = BCM6358_MODE_MUX_##bit, \ 263 unsigned int val = pg->mode_val; in bcm6358_pinctrl_set_mux()
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D | pinctrl-bcm6318.c | 41 unsigned mode_val:1; member 315 .mode_val = 1, \ 430 bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6318_pinctrl_set_mux()
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/drivers/clk/qcom/ |
D | clk-alpha-pll.c | 807 u32 mode_val, opmode_val; in trion_pll_is_enabled() local 810 ret = regmap_read(regmap, PLL_MODE(pll), &mode_val); in trion_pll_is_enabled() 815 return ((opmode_val & PLL_RUN) && (mode_val & PLL_OUTCTRL)); in trion_pll_is_enabled()
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/drivers/media/dvb-frontends/drx39xyj/ |
D | drxj.c | 9937 u8 mode_val[4] = { 2, 2, 0, 1 }; in ctrl_set_oob() local 10098 mode_index = mode_val[(set_param_parameters[0] & 0xC0) >> 6]; in ctrl_set_oob()
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